K6X0808C1D-TF55

Manufacturer Part NumberK6X0808C1D-TF55
ManufacturerSamsung
K6X0808C1D-TF55 datasheets
 


Specifications of K6X0808C1D-TF55

Date_code06+  
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K6X0808C1D Family
TIMING WAVEFORM OF WRITE CYCLE(1)
Address
CS
WE
Data in
Data Undefined
Data out
TIMING WAVEFORM OF WRITE CYCLE(2)
Address
CS
WE
Data in
Data out
NOTES (WRITE CYCLE)
1. A write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE
going low : A write end at the earliest transition among CS going high and WE going high, t
to the end of write.
2. t
is measured from the CS going low to the end of write.
CW
3. t
is measured from the address valid to the beginning of write.
AS
4. t
is measured from the end or write to the address change. t
WR
DATA RETENTION WAVE FORM
CS controlled
V
CC
4.5V
2.2V
V
DR
CS
GND
(WE Controlled)
t
WC
t
CW(2)
t
AW
t
WP(1)
t
AS(3)
t
DW
Data Valid
t
WHZ
(CS Controlled)
t
WC
t
t
AS(3)
CW(2)
t
AW
t
WP(1)
t
DW
Data Valid
High-Z
applied in case a write ends as CS or WE going high.
WR
Data Retention Mode
t
SDR
CS V
- 0.2V
CC
7
CMOS SRAM
t
WR(4)
t
DH
t
OW
t
WR(4)
t
DH
High-Z
is measured from the begining of write
WP
t
RDR
Revision 1.0
December 2003