K4T1G164QE-HCF7 Samsung, K4T1G164QE-HCF7 Datasheet - Page 41

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K4T1G164QE-HCF7

Manufacturer Part Number
K4T1G164QE-HCF7
Description
Manufacturer
Samsung
Datasheet

Specifications of K4T1G164QE-HCF7

Date_code
10+
K4T1G044QE
K4T1G084QE
K4T1G164QE
20. Input waveform timing tDS with differential data strobe enabled MR[bit10]=0, is referenced from the input signal crossing at the V
data strobe crosspoint for a rising signal, and from the input signal crossing at the V
to the device under test. DQS, DQS signals must be monotonic between V
21. Input waveform timing tDH with differential data strobe enabled MR[bit10]=0, is referenced from the differential data strobe crosspoint to the input signal crossing
at the V
(DC) level for a falling signal and from the differential data strobe crosspoint to the input signal crossing at the V
IH
the device under test. DQS, DQS signals must be monotonic between V
DQS
DQS
22. Input waveform timing is referenced from the input signal crossing at the V
under test. See Figure 19.
23. Input waveform timing is referenced from the input signal crossing at the V
under test. See Figure 19.
CK
CK
(AC) level to the differential data strobe crosspoint for a falling signal applied
IL
(DC)max and V
IL
(DC)max and V
IL
IH
tDH
tDS
tDS
Figure 18 - Differential input waveform timing - tDS and tDH
(AC) level for a rising signal and V
IH
(DC) level for a rising signal and V
IL
tIH
tIS
tIS
Figure 19 - Differential input waveform timing - tIS and tIH
41 of 45
DDR2 SDRAM
(AC) level to the differential
IH
(DC)min. See Figure 18.
IH
(DC) level for a rising signal applied to
IL
(DC)min. See Figure 18.
tDH
V
DDQ
V
(AC)min
IH
V
(DC)min
IH
V
(DC)
REF
V
(DC)max
IL
V
(AC)max
IL
V
SS
(AC) for a falling signal applied to the device
IL
(DC) for a falling signal applied to the device
IH
tIH
V
DDQ
V
(AC)min
IH
V
(DC)min
IH
V
(DC)
REF
V
(DC)max
IL
V
(AC)max
IL
V
SS
Rev. 1.1 December 2008

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