# K4T1G164QE-HCF7

Manufacturer Part NumberK4T1G164QE-HCF7
ManufacturerSamsung
K4T1G164QE-HCF7 datasheet

## Specifications of K4T1G164QE-HCF7

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K4T1G044QE
K4T1G084QE
K4T1G164QE
Definitions :
- tCK(avg)
tCK(avg) is calculated as the average clock period across any consecutive 200 cycle window.
N
tCK(avg) =
tCK
j = 1
N = 200
where
- tCH(avg) and tCL(avg)
tCH(avg) is defined as the average HIGH pulse width, as calculated across any consecutive 200 HIGH pulses.
N
tCH(avg) =
tCH
j = 1
N = 200
where
tCL(avg) is defined as the average LOW pulse width, as calculated across any consecutive 200 LOW pulses.
N
tCL(avg) =
tCL
j = 1
N = 200
where
- tJIT(duty)
tJIT(duty) is defined as the cumulative set of tCH jitter and tCL jitter. tCH jitter is the largest deviation of any single tCH from tCH(avg). tCL jitter is the larg-
est deviation of any single tCL from tCL(avg).
tJIT(duty) = Min/max of {tJIT(CH), tJIT(CL)}
where,
tJIT(CH) = {tCHi- tCH(avg) where i=1 to 200}
tJIT(CL) = {tCLi- tCL(avg) where i=1 to 200}
- tJIT(per), tJIT(per,lck)
tJIT(per) is defined as the largest deviation of any single tCK from tCK(avg).
tJIT(per) = Min/max of {tCKi- tCK(avg) where i=1 to 200}
tJIT(per) defines the single period jitter when the DLL is already locked.
tJIT(per,lck) uses the same definition for single period jitter, during the DLL locking period only.
tJIT(per) and tJIT(per,lck) are not guaranteed through final production testing.
- tJIT(cc), tJIT(cc,lck)
tJIT(cc) is defined as the difference in clock period between two consecutive clock cycles : tJIT(cc) = Max of |tCK
tJIT(cc) defines the cycle to cycle jitter when the DLL is already locked.
tJIT(cc,lck) uses the same definition for cycle to cycle jitter, during the DLL locking period only.
tJIT(cc) and tJIT(cc,lck) are not guaranteed through final production testing.
- tERR(2per), tERR (3per), tERR (4per), tERR (5per), tERR (6-10per) and tERR (11-50per)
tERR is defined as the cumulative error across multiple consecutive cycles from tCK(avg).
/N
j
/(N x tCK(avg))
j
/(N x tCK(avg))
j
i + n - 1
tERR(nper) =
- n x tCK(avg)
tCK
j
j = 1
n = 2
for
tERR(2per)
n = 3
for
tERR(3per)
n = 4
for
tERR(4per)
where
n = 5
for
tERR(5per)
6 ≤ n ≤ 10
for
tERR(6-10per)
11 ≤ n ≤ 50
for
tERR(11-50per)
43 of 45
DDR2 SDRAM
- tCKi|
i+1
Rev. 1.1 December 2008