K4T1G164QE-HCF7

Manufacturer Part NumberK4T1G164QE-HCF7
ManufacturerSamsung
K4T1G164QE-HCF7 datasheet
 

Specifications of K4T1G164QE-HCF7

Date_code10+  
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
Page 6/45

Download datasheet (2Mb)Embed
PrevNext
K4T1G044QE
K4T1G084QE
K4T1G164QE
3.2 x8 package pinout (Top View) : 60ball FBGA Package
1
V
A
DD
B
DQ6
V
C
DDQ
D
DQ4
V
E
DDL
F
G
BA2
H
V
J
SS
K
V
L
DD
Note :
1. Pins B3 and A2 have identical capacitances as pins B7 and A8.
2. For a Read, when enabled, strobe pair RDQS & RDQS are identical in function and timing to strobe pair DQS & DQS and
input data masking function is disabled.
3. The function of DM or RDQS/RDQS is enabled by EMRS command.
4. V
and V
are power and ground for the DLL. It is recommended that they be isolated on the device from V
DDL
SSDL
V
, and V
.
SS
SSQ
Ball Locations (x8)
Populated ball
Ball not populated
Top view
(See the balls through package)
2
3
4
5
6
V
V
NU/RDQS
SS
SSQ
V
DM/RDQS
DQS
SSQ
V
V
DQ1
DDQ
DDQ
V
DQ3
DQ2
SSQ
V
V
V
REF
SS
SSDL
CKE
WE
RAS
BA0
BA1
CAS
A10/AP
A1
A2
A3
A5
A6
A7
A9
A11
A12
NC
NC
1
2
A
B
C
D
E
F
G
H
J
K
L
6 of 45
DDR2 SDRAM
7
8
9
V
DQS
DDQ
V
DQ7
SSQ
V
DQ0
DDQ
V
DQ5
SSQ
V
CK
DD
CK
ODT0
CS
V
A0
DD
A4
V
A8
SS
A13
DD
3
4
5
6
7
8
9
Rev. 1.1 December 2008
,V
,
DDQ