EP910LI-35

Manufacturer Part NumberEP910LI-35
ManufacturerAltera Corporation
EP910LI-35 datasheet
 


Specifications of EP910LI-35

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Table 8. EP610-15 & EP610-20 External Timing Parameters
Symbol
Parameter
t
Input to non-registered output
PD1
t
I/O input to non-registered output
PD2
t
Input to output enable
PZX
t
Input to output disable
PXZ
t
Asynchronous output clear time
CLR
f
Maximum clock frequency
MAX
t
Global clock input setup time
SU
t
Global clock input hold time
H
t
Global clock high time
CH
t
Global clock low time
CL
t
Global clock to output delay
CO1
t
Global clock minimum period
CNT
f
Maximum internal global clock
CNT
frequency
t
Array clock input setup time
ASU
t
Array clock input hold time
AH
t
Array clock high time
ACH
t
Array clock low time
ACL
t
Output data hold time after clock
ODH
t
Array clock to output delay
ACO1
t
Array clock minimum period
ACNT
f
Array clock internal maximum
ACNT
frequency
Table 9. EP610-15 & EP610-20 Internal Timing Parameters (Part 1 of 2)
Symbol
Parameter
t
Input pad and buffer delay
IN
t
I/O input pad and buffer delay
IO
t
Logic array delay
LAD
t
Output buffer and pad delay
OD
t
Output buffer enable delay
ZX
t
Output buffer disable delay
XZ
Altera Corporation
Tables 8
and
9
show the timing parameters for EP610-15 and EP610-20
devices.
Conditions
C1 = 35 pF
C1 = 35 pF
C1 = 35 pF
C1 = 5 pF
(4)
C1 = 35 pF
(5)
(6)
C1 = 35 pF
(7)
(6)
Conditions
C1 = 35 pF
C1 = 35 pF
C1 = 5 pF
Classic EPLD Family Data Sheet
Notes (1), (2)
EP610-15
EP610-20
Non-Turbo
Adder
Min Max Min Max
(3)
15.0
20.0
20.0
17.0
22.0
20.0
15.0
20.0
20.0
15.0
20.0
20.0
15.0
20.0
20.0
83.3
62.5
0.0
9.0
11.0
20.0
0.0
0.0
0.0
6.0
8.0
0.0
6.0
8.0
0.0
11.0
13.0
0.0
12.0
16.0
0.0
83.3
62.5
0.0
6.0
8.0
20.0
6.0
8.0
0.0
7.0
9.0
0.0
7.0
9.0
0.0
1.0
1.0
1.0
15.0
20.0
20.0
14.0
18.0
0.0
71.4
55.6
0.0
EP610-15 EP610-20
Min Max Min Max
4.0
2.0
6.0
5.0
5.0
5.0
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
ns
ns
ns
ns
MHz
Unit
4.0
ns
2.0
ns
11.0
ns
5.0
ns
5.0
ns
5.0
ns
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