24LC256TISM Microchip Technology Inc., 24LC256TISM Datasheet
24LC256TISM
Manufacturer Part Number
24LC256TISM
Description
SOP8
Manufacturer
Microchip Technology Inc.
Datasheet
1.24LC256TISM.pdf
(28 pages)
Specifications of 24LC256TISM
Date_code
07+
Device Selection Table
Features
• Low-power CMOS technology:
• 2-wire serial interface bus, I
• Cascadable for up to eight devices
• Self-timed erase/write cycle
• 64-byte Page Write mode available
• 5 ms max. write cycle time
• Hardware write-protect for entire array
• Output slope control to eliminate ground bounce
• Schmitt Trigger inputs for noise suppression
• 1,000,000 erase/write cycles
• Electrostatic discharge protection > 4000V
• Data retention > 200 years
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN
• Standard and Pb-free finishes available
• Temperature ranges:
Package Types
*24XX256 is used in this document as a generic part number for the 24AA256/24LC256/24FC256 devices.
2004 Microchip Technology Inc.
Note 1:
24AA256
24LC256
24FC256
- Maximum write current 3 mA at 5.5V
- Maximum read current 400 A at 5.5V
- Standby current 100 nA typical at 5.5V
packages, 14-lead TSSOP package
- Industrial (I):
- Automotive (E):
Number
V
Note: * Pins A0 and A1 are no connects for the MSOP package only.
A0
A1
A2
SS
Part
2:
1
2
3
4
100 kHz for V
400 kHz for V
PDIP/SOIC
2.5-5.5V
1.8-5.5V
1.8-5.5V
Range
V
CC
8
7
6
5
256K I
CC
CC
V
WP
SCL
SDA
-40 C to +85 C
-40 C to +125 C
CC
Max. Clock
Frequency
< 2.5V.
< 2.5V.
400 kHz
2
1 MHz
400 kHz
C
™
V
A0
A1
A2
compatible
SS
(2)
(1)
2
24AA256/24LC256/24FC256
C
TSSOP/MSOP *
1
2
3
4
™
Ranges
Temp.
I, E
CMOS Serial EEPROM
I
I
8
7
6
5
V
WP
SCL
SDA
CC
Description
The Microchip Technology Inc. 24AA256/24LC256/
24FC256 (24XX256*) is a 32K x 8 (256 Kbit) Serial
Electrically Erasable PROM, capable of operation
across a broad voltage range (1.8V to 5.5V). It has
been developed for advanced, low-power applications
such as personal communications or data acquisition.
This device also has a page write capability of up to 64
bytes of data. This device is capable of both random
and sequential reads up to the 256K boundary.
Functional address lines allow up to eight devices on
the same bus, for up to 2 Mbit address space. This
device is available in the standard 8-pin plastic DIP,
SOIC, TSSOP, MSOP, DFN and 14-lead TSSOP
packages.
Block Diagram
V
SDA
NC
NC
NC
I/O
A0
A1
A2
SS
Control
Logic
V
V
CC
SS
I/O
1
2
3
4
5
6
7
SCL
TSSOP
A0 A1A2
14
13
12
10
Control
11
Memory
9
8
Logic
WP
V
WP
NC
NC
NC
SCL
SDA
CC
XDEC
V
A0
A1
A2
SS
1
2
3
4
DS21203M-page 1
DFN
HV Generator
Page Latches
Sense Amp.
R/W Control
EEPROM
Array
YDEC
8
7
6
5
V
WP
SCL
SDA
CC
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