DescriptionQFP80
ManufacturerAnalog Devices

Date_code08+
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Page 19/64
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POWER DISSIPATION EXAMPLE
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
2
C
V
f
DD
C = load capacitance, f = output switching frequency.
Example:
In an ADSP-2101 application where external data memory is
used and no other outputs are active, power dissipation is
calculated as follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
= 5.0 V and t
DD
Total Power Dissipation = P
+ (C
INT
P
= internal power dissipation (from Figure 11).
INT
2
(C
V
f ) is calculated for each output:
DD
# of
2
Output
Pins
C
V
DD
2
10 pF
5
V
2
Data, WR
9
10 pF
5
V
2
RD
1
10 pF
5
V
2
CLKOUT
1
10 pF
5
V
Total power dissipation for this example = P
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating:
T
= T
– (PD
)
AMB
CASE
CA
T
= Case Temperature in C
CASE
PD = Power Dissipation in W
= Thermal Resistance (Case-to-Ambient)
CA
= Thermal Resistance (Junction-to-Ambient)
JA
= Thermal Resistance (Junction-to-Case)
JC
Package
JA
PGA
18 C/W
9 C/W
PLCC
27 C/W
16 C/W
PQFP
60 C/W
18 C/W
TQFP
60 C/W
18 C/W
REV. B
= 50 ns.
CK
2
V
f )
DD
Figure 12. Typical Output Rise Time vs. Load Capacitance, C
(at Maximum Ambient Operating Temperature)
f
20 MHz = 40.0 mW
10 MHz = 22.5 mW
10 MHz = 2.5 mW
20 MHz = 5.0 mW
70.0 mW
+ 70.0 mW.
INT
–1
–2
–3
Figure 13. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
JC
CA
9 C/W
11 C/W
42 C/W
42 C/W
–19–
8
7
V
= 4.5V
DD
6
5
4
3
2
1
0
0
25
50
75
100
125
150
175
C
– pF
L
5
4
V
= 4.5V
3
DD
2
1
0
0
25
50
75
100 125
150
175
C
– pF
L
(at Maximum Ambient Operating Temperature)
L
L