# ADSP2115BSZ80 Analog Devices, ADSP2115BSZ80 Datasheet - Page 23 Manufacturer Part Number
Description
QFP80
Manufacturer
Analog Devices
Datasheet

#### Specifications of ADSP2115BSZ80

Date_code
08+
POWER DISSIPATION EXAMPLE
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
2
C
V
f
DD
C = load capacitance, f = output switching frequency.
Example:
In an ADSP-2111 application where external data memory is
used and no other outputs are active, power dissipation is
calculated as follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
= 5.0 V and t
DD
Total Power Dissipation = P
+ (C
INT
P
= internal power dissipation (from Figure 17).
INT
2
(C
V
f ) is calculated for each output:
DD
# of
2
Output
Pins
C
V
DD
2
10 pF
5
V
2
Data, WR
9
10 pF
5
V
2
RD
1
10 pF
5
V
2
CLKOUT
1
10 pF
5
V
Total power dissipation for this example = P
ENVIRONMENTAL CONDITIONS
Ambient Temperature Rating:
T
= T
– (PD
)
AMB
CASE
CA
T
= Case Temperature in C
CASE
PD = Power Dissipation in W
= Thermal Resistance (Case-to-Ambient)
CA
= Thermal Resistance (Junction-to-Ambient)
JA
= Thermal Resistance (Junction-to-Case)
JC
Package
JA
PGA
35 C/W
18 C/W
PQFP
42 C/W
18 C/W
REV. B
Figures 18 and 19 show capacitive loading characteristics for the
= 50 ns.
CK
Figure 18. Typical Output Rise Time vs. Load Capacitance, C
2
V
f )
DD
(at Maximum Ambient Operating Temperature)
f
20 MHz = 40.0 mW
10 MHz = 22.5 mW
10 MHz = 2.5 mW
20 MHz = 5.0 mW
NOMINAL
70.0 mW
+ 70.0 mW.
INT
Figure 19. Typical Output Valid Delay or Hold vs. Load
Capacitance, C
JC
CA
17 C/W
23 C/W
–23–
14
V
= 4.5V
DD
12
10
8
6
4
2
25
50
75
100
125
150
C
– pF
L
+12
+10
V
= 4.5V
DD
+8
+6
+4
+2
–2
–4
–6
25
50
75
100
125
150
C
– pF
L
(at Maximum Ambient Operating Temperature)
L
L