ADSP2115BSZ80

Manufacturer Part NumberADSP2115BSZ80
DescriptionQFP80
ManufacturerAnalog Devices
ADSP2115BSZ80 datasheet
 


Specifications of ADSP2115BSZ80

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Page 35/64

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TIMING PARAMETERS (ADSP-2101/2105/2111/2115/2161/2163)
SERIAL PORTS
Parameter
Timing Requirement:
t
SCLK Period
SCK
t
DR/TFS/RFS Setup before SCLK Low
SCS
t
DR/TFS/RFS Hold after SCLK Low
SCH
t
SCLK
Width
SCP
IN
Switching Characteristic:
t
CLKOUT High to SCLK
CC
OUT
t
SCLK High to DT Enable
SCDE
t
SCLK High to DT Valid
SCDV
t
TFS/RFS
Hold after SCLK High
RH
OUT
t
TFS/RFS
Delay from SCLK High
RD
OUT
t
DT Hold after SCLK High
SCDH
t
TFS (Alt) to DT Enable
TDE
t
TFS (Alt) to DT Valid
TDV
t
SCLK High to DT Disable
SCDD
t
RFS (Multichannel, Frame Delay Zero)
RDV
to DT Valid
*Maximum serial port operating frequency is 13.824 MHz for all processor speed grades except the 12.5 MHz ADSP-2101 and 13.0 MHz ADSP-2111.
CLKOUT
SCLK
DR
RFS
IN
TFS
IN
RFS
OUT
TFS
OUT
DT
TFS
( ALTERNATE
FRAME MODE )
RFS
( MULTICHANNEL MODE,
FRAME DELAY 0 {MFD = 0} )
REV. B
12.5 MHz
13.0 MHz
Min Max
Min Max
80
76.9
8
8
10
10
30
28
20
35
19.2 34.2
0
0
20
20
0
0
20
20
0
0
0
0
18
18
25
25
20
20
t
t
CC
CC
t
t
SCS
SCH
t
RD
t
RH
t
SCDV
t
t
SCDH
SCDE
t
TDE
t
TDV
t
RDV
Figure 34. Serial Ports
–35–
ADSP-21xx
Frequency
13.824 MHz*
Dependency
Min Max
Min
Max
72.3
8
10
28
18.1 33.1
0.25t
0.25t
+ 15ns
CK
CK
0
20
0
20
0
0
18
25
20
t
SCK
t
SCP
t
SCP
t
SCDD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns