ADSP2115BSZ80

Manufacturer Part NumberADSP2115BSZ80
DescriptionQFP80
ManufacturerAnalog Devices
ADSP2115BSZ80 datasheet
 

Specifications of ADSP2115BSZ80

Date_code08+  
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TIMING PARAMETERS (ADSP-2103/2162/2164)
CLOCK SIGNALS & RESET
Parameter
Timing Requirement:
t
CLKIN Period
CK
t
CLKIN Width Low
CKL
t
CLKIN Width High
CKH
t
RESET Width Low
RSP
Switching Characteristic:
t
CLKOUT Width Low
CPL
t
CLKOUT Width High
CPH
t
CLKIN High to CLKOUT High
CKOH
NOTES
1
Applies after powerup sequence is complete. Internal phase lock loop requires no more than 2000 CLKIN cycles assuming stable CLKIN (not including crystal
oscillator startup time).
CLKIN
CLKOUT
REV. B
Frequency
10.24 MHz
Dependency
Min
Max
Min
97.6
150
20
20
1
488
5t
CK
38.8
0.5t
– 10
CK
38.8
0.5t
– 10
CK
0
20
t
CK
t
CKH
t
CKL
t
CKOH
t
CPH
t
CPL
Figure 39. Clock Signals
–45–
ADSP-21xx
Max
Unit
ns
ns
ns
ns
ns
ns
ns