AT28C64B25SC ATMEL Corporation, AT28C64B25SC Datasheet

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AT28C64B25SC

Manufacturer Part Number
AT28C64B25SC
Description
SOP28
Manufacturer
ATMEL Corporation
Datasheet

Specifications of AT28C64B25SC

Date_code
05+
Features
1. Description
The AT28C64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 150 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28C64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA POLLING of I/O7. Once the end of a write cycle has been
detected, a new access for a read or write can begin.
Atmel’s AT28C64B has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 150 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
– Internal Address and Data Latches for 64 Bytes
– Page Write Cycle Time: 10 ms Maximum (Standard)
– 1 to 64-byte Page Write Operation
– 40 mA Active Current
– 100 µA CMOS Standby Current
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)
64K (8K x 8)
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28C64B
0270K–PEEPR–10/06

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