ATMEGA8515L8AU

Manufacturer Part NumberATMEGA8515L8AU
DescriptionTQFP44
ManufacturerATMEL Corporation
ATMEGA8515L8AU datasheet
 

Specifications of ATMEGA8515L8AU

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Page 92/257

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ATmega8515(L)
92
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the
WGM01:0 bit setting. Table 45 shows the COM01:0 bit functionality when the WGM01:0
bits are set to a normal or CTC mode (non-PWM).
Table 45. Compare Output Mode, non-PWM Mode
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
0
1
Toggle OC0 on Compare Match.
1
0
Clear OC0 on Compare Match.
1
1
Set OC0 on Compare Match.
Table 46 shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Table 46. Compare Output Mode, Fast PWM Mode
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
0
1
Reserved
1
0
Clear OC0 on Compare Match, set OC0 at TOP (Non-
Inverting).
1
1
Set OC0 on Compare Match, clear OC0 at TOP (Inverting).
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 86 for more details.
Table 47 shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase
correct PWM mode.
Table 47. Compare Output Mode, Phase Correct PWM Mode
COM01
COM00
Description
0
0
Normal port operation, OC0 disconnected.
0
1
Reserved
1
0
Clear OC0 on Compare Match when up-counting. Set OC0 on
Compare Match when downcounting.
1
1
Set OC0 on Compare Match when up-counting. Clear OC0 on
Compare Match when downcounting.
Note:
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 88 for more details.
• Bit 2:0 – CS02:0: Clock Select
(1)
(1)
2512J–AVR–10/06