CY62256LL70ZC Cypress Semiconductor Corporation., CY62256LL70ZC Datasheet

CY62256LL70ZC

Manufacturer Part Number

CY62256LL70ZC

Description

SOP-28

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.CY62256L70SNI.pdf (11 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

CY62256LL70ZC-X

Manufacturer:

CYPRESS/赛普拉斯

Quantity:

20 000

Current page: 1 of 11
Download datasheet (282Kb)

Cypress Semiconductor Corporation

Document #: 38-05248 Rev. *B

Features

• High speed: 55 ns and 70 ns

• Voltage range: 4.5V–5.5V operation

• Low active power (70 ns, LL version)

• Low standby power (70 ns, LL version)

• Easy memory expansion with CE and OE features

• TTL-compatible inputs and outputs

• Automatic power-down when deselected

• CMOS for optimum speed/power

• Package available in a standard 450-mil-wide (300-mil

Note:

Logic Block Diagram

body width) 28-lead narrow SOIC, 28-lead TSOP-1,

28-lead reverse TSOP-1, and 600-mil 28-lead PDIP

packages

— 275 mW (max.)

— 28 W (max.)

For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

•

3901 North First Street

INPUTBUFFER

512 x 512

DECODER

COLUMN

ARRA Y

Functional Description

The CY62256 is a high-performance CMOS static RAM

organized as 32K words by 8 bits. Easy memory expansion is

provided by an active LOW chip enable (CE) and active LOW

output enable (OE) and three-state drivers. This device has an

automatic

consumption by 99.9% when deselected.

An active LOW write enable signal (WE) controls the

writing/reading operation of the memory. When CE and WE

inputs are both LOW, data on the eight data input/output pins

(I/O

addressed by the address present on the address pins (A

through A

the device and enabling the outputs, CE and OE active LOW,

while WE remains inactive or HIGH. Under these conditions,

the contents of the location addressed by the information on

address pins are present on the eight data input/output pins.

The input/output pins remain in a high-impedance state unless

the chip is selected, outputs are enabled, and write enable

(WE) is HIGH.

POWER

DOWN

through I/O

256K (32K x 8) Static RAM

•

San Jose

). Reading the device is accomplished by selecting

power-down

) is written into the memory location

•

feature,

CA 95134

I/O

[1]

Revised August 27, 2002

reducing

•

408-943-2600

CY62256

the

power

Related parts for CY62256LL70ZC

Related keywords

CY62256LL70ZC datasheet
CY62256LL70ZC data sheet
CY62256LL70ZC pdf datasheet
CY62256LL70ZC component
CY62256LL70ZC part
CY62256LL70ZC distributor
CY62256LL70ZC RoHS
CY62256LL70ZC datasheet download