CY7C1069DV3310ZSXI Cypress Semiconductor Corporation., CY7C1069DV3310ZSXI Datasheet

CY7C1069DV3310ZSXI

Manufacturer Part Number

CY7C1069DV3310ZSXI

Description

TSOP

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.CY7C1069DV3310ZSXI.pdf (10 pages)

Specifications of CY7C1069DV3310ZSXI

Date_code

10+

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Features

■

Cypress Semiconductor Corporation

Document Number: 38-05478 Rev. *D

High speed

❐

Low active power

❐

Low CMOS standby power

❐

Operating voltages of 3.3 ± 0.3V

2.0V data retention

Automatic power down when deselected

TTL compatible inputs and outputs

Easy memory expansion with CE

Available in Pb-free 54-Pin TSOP II and 48-Ball VFBGA

packages

Logic Block Diagram

SB2

= 10 ns

= 175 mA at 10 ns

= 25 mA

and CE

•

features

198 Champion Court

INPUT BUFFER

DECODER

COLUMN

ARRAY

2M x 8

Functional Description

The CY7C1069DV33 is a high performance CMOS Static RAM

organized as 2,097,152 words by 8 bits.

To write to the device, take Chip Enables (CE

HIGH) and Write Enable (WE) input LOW. Data on the eight IO

pins (IO

on the address pins (A

To read from the device, take Chip Enables (CE

HIGH) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. Under these conditions, the contents of the

memory location specified by the address pins will appear on the

IO pins. See

Read and Write modes.

The input and output pins (IO

impedance state when the device is deselected (CE

operation (CE

The CY7C1069DV33 is available in a 54-pin TSOP II package

with center power and ground (revolutionary) pinout, and a

48-Ball very fine pitch ball grid array (VFBGA) package.

LOW), the outputs are disabled (OE HIGH), or during a write

•

through IO

San Jose

16-Mbit (2M x 8) Static RAM

Truth Table

LOW, CE

) is then written into the location specified

CA 95134-1709

through A

on page 8 for a complete description of

– IO

HIGH, and WE LOW).

through IO

Revised September 06, 2007

CY7C1069DV33

) are placed in a high

•

LOW and CE

408-943-2600

HIGH or

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