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M30626FJPFPU5C

M30626FJPFPU5C | |
---|---|
Manufacturer Part Number | M30626FJPFPU5C |
Description | QFP-100 |
Manufacturer | Renesas Electronics Corporation. |
M30626FJPFPU5C datasheet |
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Specifications of M30626FJPFPU5C | |||
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Date_code | 10+ |
PrevNext
Chapter 3
Functions
SBB
[ Syntax ]
SBB.size
src,dest
[ Operation ]
dest
dest
–
src
–
[ Function ]
• This instruction subtracts src and inverted C flag from dest and stores the result in dest .
• If dest is an A0 or A1 when the size specifier (.size) you selected is (.B), src is zero-expanded to
perform operation in 16 bits. If src is an A0 or A1, operation is performed on the 8 low-order bits of A0
or A1.
[ Selectable src/dest ]
src
R0L/R0
R0H/R1
R1L/R2
*1
*1
A0/A0
A1/A1
[A0]
dsp:8[A0]
dsp:8[A1]
dsp:8[SB]
dsp:16[A0] dsp:16[A1]
dsp:16[SB]
dsp:20[A0] dsp:20[A1]
abs20
R2R0
R3R1
A1A0
*1 If you specify (.B) for the size specifier (.size), you cannot choose A0 or A1 for src and dest simulta-
neously.
[ Flag Change ]
U
I
O B
S
Flag
Conditions
O :
The flag is set when a signed operation resulted in exceeding +32767 (.W) or –32768 (.W), or
+127 (.B) or –128 (.B); otherwise cleared.
S :
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
Z :
The flag is set when the operation resulted in 0; otherwise cleared.
C :
The flag is set when an unsigned operation resulted in any value equal to or greater than 0;
otherwise cleared.
[ Description Example ]
SBB.B
#2,R0L
SBB.W
A0,R0
SBB.B
A0,R0L
SBB.B
R0L,A0
[ Related Instructions ]
ADC,ADCF,ADD,SUB
Subtract with borrow
SuBtract with Borrow
B , W
___
C
R1H/R3
R0L/R0
*1
[A1]
A0/A0
dsp:8[FB] dsp:8[A0]
abs16
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
#IMM
dsp:20[A0] dsp:20[A1] abs20
R2R0
Z
D
C
; A0’s 8 low-order bits and R0L are operated on.
; R0L is zero-expanded and operated with A0.
116
3.2
SBB
[ Instruction Code/Number of Cycles ]
dest
R0H/R1
R1L/R2
R1H/R3
*1
A1/A1
[A0]
[A1]
dsp:8[A1]
dsp:8[SB]
dsp:8[FB]
R3R1
A1A0
Functions
Page= 224
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