M30626FJPFPU5C

Manufacturer Part NumberM30626FJPFPU5C
DescriptionQFP-100
ManufacturerRenesas Electronics Corporation.
M30626FJPFPU5C datasheet
 


Specifications of M30626FJPFPU5C

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Chapter 3
Functions
SHL
[ Syntax ]
SHL.size
src,dest
[ Operation ]
When src < 0
When src > 0
[ Function ]
• This instruction logically shifts dest left or right the number of bits indicated by src . The bit overflowing
from LSB (MSB) is transferred to the C flag.
• The direction of shift is determined by the sign of src . If src is positive, bits are shifted left; if negative,
bits are shifted right.
• If src is an immediate, the number of shifts is –8 to –1 and +1 to +8. You cannot set values less than
–8, equal to 0, or greater than +8.
• If src is a register and you selected (.B) for the size specifier (.size), the number of shifts is –8 to +8.
Although you can set 0, no bits are shifted and no flags are changed. If you set a value less than –8 or
greater than +8, the result of shift is indeterminate.
• If src is a register and you selected (.W) or (.L) for the size specifier (.size), the number of shifts is –16
to +16. Although you can set 0, no bits are shifted and no flags are changed. If you set a value less
than –16 or greater than +16, the result of shift is indeterminate.
[ Selectable src/dest ]
src
R0L/R0
R0H/R1
R1L/R2
A0/A0
A1/A1
[A0]
dsp:8[A0]
dsp:8[A1]
dsp:8[SB]
dsp:16[A0] dsp:16[A1]
dsp:16[SB]
dsp:20[A0] dsp:20[A1]
abs20
R2R0
R3R1
A1A0
*1 If src is R1H, you cannot choose R1 or R1H for dest .
*2 The range of values that can be taken on is –8 < #IMM < +8. However, you cannot set 0.
*3 You can only specify (.L) for the size specifier (.size). For other dest , you can specify (.B) or (.W).
[ Flag Change ]
Flag
U
I
O
B
S
Change
Conditions
S :
The flag is set when the operation resulted in MSB = 1; otherwise cleared.
Z :
The flag is set when the operation resulted in 0; otherwise cleared. However, the flag is
indeterminate if you selected (.L) for the size specifier (.size).
C :
The flag is set when the bit shifted out last is 1; otherwise cleared. However, the flag is
indeterminate if you selected (.L) for the size specifier (.size).
[ Description Example ]
SHL.B
#3,R0L
SHL.B
#–3,R0L
SHL.L
R1H,R2R0
[ Related Instructions ]
ROLC,RORC,ROT,SHA
Shift logical
SHift Logical
B , W , L
MSB
dest
0
MSB
dest
C
*1
R1H
/R3
R0L/R0
[A1]
A0/A0
dsp:8[FB]
dsp:8[A0]
abs16
dsp:16[A0] dsp:16[A1] dsp:16[SB] abs16
*2
#IMM
dsp:20[A0] dsp:20[A1] abs20
*3
R2R0
Z
D
C
*1 If the number of shifts is 0, no flags are changed.
; Logically shifted left
; Logically shifted right
119
3.2
[ Instruction Code/Number of Cycles ]
LSB
C
LSB
0
dest
*1
R0H/R1
R1L/R2
R1H/R3
A1/A1
[A0]
[A1]
dsp:8[A1]
dsp:8[SB]
dsp:8[FB]
*3
R3R1
A1A0
Functions
SHL
Page= 230
*1