M30626FJPFPU5C

Manufacturer Part NumberM30626FJPFPU5C
DescriptionQFP-100
ManufacturerRenesas Electronics Corporation.
M30626FJPFPU5C datasheet
 


Specifications of M30626FJPFPU5C

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Chapter 1 Overview
(1) Bit specification by bit, base
Figure 1.7.5 shows the relationship between memory map and bit map.
Memory bits can be handled as an array of consecutive bits. Bits can be specified by a given combina-
tion of bit and base. Using bit 0 of the address that is set to base as the reference (= 0), set the desired
bit position to bit. Figure 1.7.6 shows examples of how to specify bit 2 of address 0000A
Address
b7
b0
0
n-1
n
n+1
Memory map
Figure 1.7.5 Relationship between memory map and bit map
Address 0000A
b7
BSET
2,AH
;
b15
BSET
10,9H
;
b23
BSET
18,8H
;
b87
BSET
82,0H
;
Figure 1.7.6 Examples of how to specify bit 2 of address 0000A
nÅ{1
n+1
n
n
b7
b0b7
b0b7
Bit map
16
b2
b0
Address 00009
16
b10 b8b7
b0
Address 00008
b18 b16b15
b8b7
b82 b80b79
b72
13
1.7 Data Types
.
16
nÅ|1
n–1
0
b0
b7
These specifica-
tion examples all
specify bit 2 of
16
address 0000A
b0
Address 00000
16
b7
b0
16
b0
.
16