MC14572UBCL Motorola, MC14572UBCL Datasheet

MC14572UBCL

Manufacturer Part Number

MC14572UBCL

Description

DIP

Manufacturer

Motorola

Datasheet

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MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Hex Gate

and N–channel enhancement mode devices in a single monolithic structure.

These complementary MOS logic gates find primary use where low power

dissipation and/or high noise immunity is desired. The chip contains four

inverters, one NOR gate and one NAND gate.

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

REV 3

1/94

MAXIMUM RATINGS*

V in , V out

Symbol

MOTOROLA CMOS LOGIC DATA

I in , I out

The MC14572UB hex functional gate is constructed with MOS P–channel

Motorola, Inc. 1995

V DD

Diode Protection on All Inputs

Single Supply Operation

Supply Voltage Range = 3.0 Vdc to 18 Vdc

NOR Input Pin Adjacent to V SS Pin to Simplify Use As An Inverter

NAND Input Pin Adjacent to V DD Pin to Simplify Use As An Inverter

NOR Output Pin Adjacent to Inverter Input Pin For OR Application

NAND Output Pin Adjacent to Inverter Input Pin For AND Application

Capable of Driving Two Low–power TTL Loads or One Low–Power

Schottky TTL Load over the Rated Temperature Range

T stg

P D

T L

Plastic “P and D/DW” Packages: – 7.0 mW/ _ C From 65 _ C To 125 _ C

Ceramic “L” Packages: – 12 mW/ _ C From 100 _ C To 125 _ C

V DD

DC Supply Voltage

Input or Output Voltage (DC or Transient)

Input or Output Current (DC or Transient),

per Pin

Power Dissipation, per Package†

Storage Temperature

Lead Temperature (8–Second Soldering)

V SS

(Voltages Referenced to V SS )

Parameter

CIRCUIT SCHEMATIC

V SS

V DD

– 0.5 to V DD + 0.5

– 0.5 to + 18.0

– 65 to + 150

Value

500

260

V SS

V DD

Unit

_ C

T A = – 55 to 125 C for all packages.

MC14572UB

ORDERING INFORMATION

MC14XXXUBCP

MC14XXXUBCL

MC14XXXUBD

LOGIC DIAGRAM

V DD = PIN 16

V SS = PIN 8

CASE 751B

CERAMIC

CASE 620

CASE 648

D SUFFIX

L SUFFIX

P SUFFIX

PLASTIC

Plastic

Ceramic

SOIC

MC14572UB

SOIC

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