S3C44B0X Samsung, S3C44B0X Datasheet - Page 122

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S3C44B0X

Manufacturer Part Number
S3C44B0X
Description
BGA
Manufacturer
Samsung
Datasheets

Specifications of S3C44B0X

Date_code
02+
S3C2400X01 RISC MICROPROCESSOR
FORMAT 1: MOVE SHIFTED REGISTER
15
14
13
12
0
0
0
OPERATION
These instructions move a shifted value between Lo registers. The THUMB assembler syntax is shown in
Table 4-2.
All instructions in this group set the CPSR condition codes.
OP
THUMB Assembler
00
LSL Rd, Rs, #Offset5
01
LSR Rd, Rs, #Offset5
10
ASR Rd, Rs, #Offset5
11
10
6
Op
Offset5
[2:0] Destination Register
[5:3] Source Register
[10:6] Immediate Vale
[12:11] Opcode
0 = LSL
1 = LSR
2 = ASR
Figure 4-2. Format 1
NOTE
Table 4-2. Summary of Format 1 Instructions
ARM Equipment
MOVS Rd, Rs, LSL #Offset5
MOVS Rd, Rs, LSR #Offset5
MOVS Rd, Rs, ASR #Offset5 Perform arithmetic shift right on Rs
THUMB INSTRUCTION SET
5
3
2
0
Rs
Rd
Action
Shift Rs left by a 5-bit immediate
value and store the result in Rd.
Perform logical shift right on Rs by a
5-bit immediate value and store the
result in Rd.
by a 5-bit immediate value and store
the result in Rd.
4-5

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