S3C44B0X

Manufacturer Part NumberS3C44B0X
DescriptionBGA
ManufacturerSamsung
S3C44B0X datasheets
 


Specifications of S3C44B0X

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S3C2400 RISC MICROPROCESSOR
Table 1-1. 208-Pin LQFP Pin Assignment (Continued)
Pin
Pin
Number
Name
191
ADDR24/GPA9
192
DATA0
193
DATA1
194
DATA2
195
DATA3
196
DATA4
197
DATA5
198
DATA6
199
DATA7
200
VDDi
201
VSSi
202
DATA8
203
DATA9
204
DATA10
205
DATA11
206
DATA12
207
DATA13
208
VDDIO
NOTES:
1.
The @BUS REQ. shows the pin states at the external bus, which is used by the other bus master.
The @STOP shows the pin states when S3C2400 is in STOP mode.
2.
' – ‘ mark indicates the unchanged pin state at STOP mode or Bus Request mode.
3.
Hi-z or Pre means Hi-z or Previous state and which is determined by the setting of MISCCR register.
4.
AI/AO means analog input/output.
5.
P, I, and O mean power, input and output respectively.
6.
The I/O state @nRESET shows the pin status in the below @nRESET duration.
nRESET
FCLK
Default
I/O State
I/O State
Function
@BUS REQ.
@STOP
ADDR24
Hi-z/O
Hi-z or Pre/O
DATA0
Hi-z
DATA1
Hi-z
DATA2
Hi-z
DATA3
Hi-z
DATA4
Hi-z
DATA5
Hi-z
DATA6
Hi-z
DATA7
Hi-z
VDDi
VSSi
DATA8
Hi-z
DATA9
Hi-z
DATA10
Hi-z
DATA11
Hi-z
DATA12
Hi-z
DATA13
Hi-z
VDDIO
4FCLK
@nRESET
PRODUCT OVERVIEW
I/O State
I/O
@nRESET
Type
O(L)
phot8
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
P
vdd1ih_core
P
vss3i
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
Hi-z
I
phbsu50ct12sm
P
vdd3op
1-15