S3C44B0X

Manufacturer Part NumberS3C44B0X
DescriptionBGA
ManufacturerSamsung
S3C44B0X datasheets
 

Specifications of S3C44B0X

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S3C2400X01 RISC MICROPROCESSOR
INTERRUPT REGISTER (INT_REG)
These registers act as status registers for the MCU when there is an interrupt event. The bits in these registers are
cleared by the MCU by writing a 1(Not "0") to each bit. Once the MCU is interrupted, MCU should read the contents
of interrupt-related registers and write back to clear the contents if it is necessary.
Register
Address
INT_REG
0x15200148
INT_REG
Bit
MCU
ERROR
[8]
R
Interrupt
/CLEAR
RESET
[7]
R
Interrupt
/CLEAR
RESUME
[6]
R
Interrupt
/CLEAR
SUSPEND
[5]
R
Interrupt
/CLEAR
EP4
[4]
R
Interrupt
/CLEAR
EP3
[3]
R
Interrupt
/CLEAR
EP2
[2]
R
Interrupt
/CLEAR
EP1
[1]
R
Interrupt
/CLEAR
EP0
[0]
R
Interrupt
/CLEAR
R/W
Description
R
Interrupt pending/clear register
USB
Description
SET
Error monitoring interrupt source.
It can be set under the following conditions:
1. crc error
SET
Reset interrupt
It can be set under the following conditions:
1. USB Reset
SET
The USB sets this bit, when it receives the Resume
signaling (Resume Command in USB bus), while in
Suspend mode. If the Resume is due to a USB reset,
then the MCU is first interrupted into a RESUME
interrupt.
SET
The USB sets this bit when it receives the Suspend
signaling. This bit is set whenever there is no activity
during 3ms on the USB bus.
Thus, if the MCU does not stop the clock after the first
Suspend interrupt, that it will be continually to be
interrupted every 3ms as long as there is no activity on
the USB bus. By default, this interrupt is masked.
SET
Endpoint4 interrupt:
1. Sets OUT_PKT_RDY bit.(EP4_OUT_CSR1[0])
2. Sets SENT_STALL bit.(EP4_OUT_CSR1[6])
SET
Endpoint3 interrupt:
1. Sets OUT_PKT_RDY bit.(EP3_OUT_CSR1[0])
2. Sets SENT_STALL bit.(EP3_OUT_CSR1[6])
SET
Endpoint2 interrupt:
1. IN_PKT_RDY is cleared.(EP2_IN_CSR1[0])
2. FIFO is flushed.(EP2_IN_CSR[2])
SET
Endpoint1 interrupt:
1. IN_PKT_RDY is cleared.(EP1_IN_CSR1[0])
2. FIFO is flushed.(EP1_IN_CSR[2])
SET
Endpoint0 interrupt:
1. OUT_PKT_RDY bit (D0) is set.(EP0_CSR[0])
2. IN_PKT_RDY bit (D1) is cleared.(EP0_CSR[1])
3. SENT_STALL bit (D2) is set.(EP0_CSR[2])
4. SETUP_END bit (D4) is set.(EP0_CSR[4])
5. DATA_END bit is cleared.(EP0_CSR[3])
(Indicates End of control transfer)
Reset Value
Initial State
2. bit stuff error
2. MCU Reset
USB DEVICE
0x00000000
0
0
0
0
0
0
0
0
0
13-5