S3C44B0X Samsung, S3C44B0X Datasheet - Page 409

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S3C44B0X

Manufacturer Part Number
S3C44B0X
Description
BGA
Manufacturer
Samsung
Datasheets

Specifications of S3C44B0X

Date_code
02+
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S3C2400 RISC MICROPROCESSOR
SAMPLING FREQUENCY AND MASTER CLOCK
Master clock frequency (PCLK) can be selected by sampling frequency as shown in Table 21-1. Because PCLK is
made by IIS prescaler, the prescaler value and PCLK type(256 or 384fs) should be determined properly. Serial bit
clock frequency type (16/32/48fs) can be selected by the serial bit per channel and PCLK as shown in Table 21-2.
(MHz)
Serial clock frequency (IISCLK)
CODECLK
IISLRCK
(fs)
LRCK
SCLK
SD
LRCK
SCLK
SD
Serial bit per channel
@CODECLK=256fs
@CODECLK=384fs
256fs
384fs
2.0480
3.0720
8.000
KHz
Table 21-2 Usable serial bit clock frequency (IISCLK = 16 or 32 or 48fs)
MSB
(1st)
Figure 21-2. IIS-Bus and MSB(Left)-justified Data Interface Formats
11.025
2.8224
4.2336
KHz
MSB
(1st)
2nd
Bit
Table 21-1 CODEC clock (CODECLK = 256 or 384fs)
2nd
LEFT
Bit
16.000
4.0960
6.1440
KHz
LEFT
MSB-JUSTIFIED FORMAT (N=8 or 16)
IIS-BUS FORMAT (N=8 or 16)
22.050
5.6448
8.4672
KHz
N-1th
N-1th
Bit
Bit
12.2880
32.000
8.1920
(last)
(last)
LSB
LSB
KHz
16fs, 32fs, 48fs
16fs, 32fs
MSB
MSB
(1st)
(1st)
8-bit
11.2896
16.9344
44.100
KHz
RIGHT
2nd
2nd
Bit
Bit
12.2880 16.3840 22.5792
18.4320 24.5760 33.8688
48.000
KHz
RIGHT
N-1th
Bit
64.000
KHz
N-1th
(last)
LSB
Bit
32fs, 48fs
LEFT
16-bit
32fs
IIS-BUS INTERFACE
88.200
KHz
(last)
MSB
LSB
(1st)
24.5760
36.8640
96.000
KHz
21-5

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