S3C44B0X

Manufacturer Part NumberS3C44B0X
DescriptionBGA
ManufacturerSamsung
S3C44B0X datasheets
 

Specifications of S3C44B0X

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S3C2400X01 RISC MICROPROCESSOR
Software Interrupt
The software interrupt instruction (SWI) is used for entering Supervisor mode, usually to request a particular
supervisor function. A SWI handler should return by executing the following irrespective of the state (ARM or Thumb):
MOV
PC,R14_svc
This restores the PC and CPSR, and returns to the instruction following the SWI.
nFIQ, nIRQ, ISYNC, LOCK, BIGEND, and ABORT pins exist only in the ARM920T CPU core.
Undefined Instruction
When ARM920T comes across an instruction which it cannot handle, it takes the undefined instruction trap. This
mechanism may be used to extend either the THUMB or ARM instruction set by software emulation.
After emulating the failed instruction, the trap handler should execute the following irrespective of the state (ARM or
Thumb):
MOVS
PC,R14_und
This restores the CPSR and returns to the instruction following the undefined instruction.
Exception Vectors
The following table shows the exception vector addresses.
Address
0x00000000
0x00000004
0x00000008
0x0000000C
0x00000010
0x00000014
0x00000018
0x0000001C
NOTE
Table 2-3. Exception Vectors
Exception
Reset
Undefined instruction
Software Interrupt
Abort (prefetch)
Abort (data)
Reserved
IRQ
FIQ
PROGRAMMER'S MODEL
Mode in Entry
Supervisor
Undefined
Supervisor
Abort
Abort
Reserved
IRQ
FIQ
2-13