TC55V16256FTI12 TOSHIBA Semiconductor CORPORATION, TC55V16256FTI12 Datasheet

TC55V16256FTI12

Manufacturer Part Number

TC55V16256FTI12

Description

TSOP44

Manufacturer

TOSHIBA Semiconductor CORPORATION

Datasheet

1.TC55V16256FTI12.pdf (11 pages)

Specifications of TC55V16256FTI12

Date_code

06+

Current page: 1 of 11
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262,144-WORD BY 16-BIT CMOS STATIC RAM

DESCRIPTION

words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it

operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode,

and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide lower and upper

byte access. This device is well suited to cache memory applications where high-speed access and high-speed

storage are required. All inputs and outputs are directly LVTTL compatible. The TC55V16256JI/FTI is available in

plastic 44-pin SOJ and 44-pin TSOP with 400mil width for high density surface assembly. The TC55V16256JI/FTI

guarantees −40° to 85°C operating temperature so it is suitable for use in wide operating temperature system.

FEATURES

•

PIN ASSIGNMENT

GND

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

I/O8

A15

A14

A13

A12

A16

The TC55V16256JI/FTI is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 262,144

Fast access time (the following are maximum values)

Low-power dissipation

(the following are maximum values)

44 PIN SOJ

Operation (max)

(TC55V16256JI)

TC55V16256JI/FTI-12:12 ns

TC55V16256JI/FTI-15:15 ns

Standby:10 mA (both devices)

Cycle Time

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

230

I/O16

I/O15

I/O14

I/O13

GND

I/O12

I/O11

I/O10

I/O9

A10

A11

A17

(TOP VIEW)

200

GND

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

I/O8

A15

A14

A13

A12

A16

44 PIN TSOP

170

150

(TC55V16256FTI)

I/O16

I/O15

I/O14

I/O13

GND

I/O12

I/O11

I/O10

I/O9

A10

A11

A17

•

Single power supply voltage of 3.3 V ± 0.3 V

Fully static operation

All inputs and outputs are LVTTL compatible

Output buffer control using OE

Data byte control using LB (I/O1 to I/O8) and

Package:

UB (I/O9 to I/O16)

SOJ44-P-400-1.27 (JI)

TSOP II44-P-400-0.80 (FTI)

PIN NAMES

I/O1 to I/O16 Data Inputs/Outputs

A0 to A17

LB , UB

GND

TC55V16256JI/FTI-12,-15

Address Inputs

Chip Enable Input

Write Enable Input

Output Enable Input

Data Byte Control Inputs

Power (+3.3 V)

Ground

Not Usable (Input)

2002-01-07 1/11

(Weight: 1.64 g typ)

(Weight: 0.45 g typ)

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