74HC14DR2G ON Semiconductor, 74HC14DR2G Datasheet

IC INVERTER HEX SCHMITT 14-SOIC

74HC14DR2G

Manufacturer Part Number
74HC14DR2G
Description
IC INVERTER HEX SCHMITT 14-SOIC
Manufacturer
ON Semiconductor
Series
74HCr
Datasheet

Specifications of 74HC14DR2G

Logic Type
Inverter with Schmitt Trigger
Number Of Inputs
1
Number Of Circuits
6
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74HC14DR2GOSTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC14DR2G
Manufacturer:
ON Semiconductor
Quantity:
500
Part Number:
74HC14DR2G
Manufacturer:
ON/安森美
Quantity:
20 000
74HC14
Hex Schmitt−Trigger
Inverter
High−Performance Silicon−Gate CMOS
The device inputs are compatible with Standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
Due to hysteresis voltage of the Schmitt trigger, the HC14 finds
applications in noisy environments.
Features
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
The 74HC14 is identical in pinout to the LS14, LS04 and the HC04.
The HC14 is useful to “square up” slow input rise and fall times.
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7A Requirements
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 60 FETs or 15 Equivalent Gates
These are Pb−Free Devices
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
14
14
(Note: Microdot may be in either location)
1
ORDERING INFORMATION
1
HC14
A
L, WL
Y
W, WW = Work Week
G or G
http://onsemi.com
CASE 751A
CASE 948G
DT SUFFIX
TSSOP−14
D SUFFIX
SOIC−14
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Pb−Free Package
Publication Order Number:
14
1
14
DIAGRAMS
1
MARKING
AWLYWW
HC14G
ALYW G
HC
74HC14/D
14
G

Related parts for 74HC14DR2G

74HC14DR2G Summary of contents

Page 1

Hex Schmitt−Trigger Inverter High−Performance Silicon−Gate CMOS The 74HC14 is identical in pinout to the LS14, LS04 and the HC04. The device inputs are compatible with Standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The HC14 ...

Page 2

... Pinout: 14−Lead Packages (Top View FUNCTION TABLE Inputs ORDERING INFORMATION Device 74HC14DR2G 74HC14DTR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free GND A5 A6 Outputs Y ...

Page 3

... SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). RECOMMENDED OPERATING CONDITIONS Symbol ...

Page 4

DC CHARACTERISTICS (Voltages Referenced to GND) Symbol Parameter V max Maximum Positive−Going Input T+ Threshold Voltage (Figure 3) V min Minimum Positive−Going Input T+ Threshold Voltage (Figure 3) V max Maximum Negative−Going Input T− Threshold Voltage (Figure 3) V min ...

Page 5

... NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). C Power Dissipation Capacitance (Per Inverter Used to determine the no−load dynamic power consumption Semiconductor High−Speed CMOS Data Book (DL129/D). INPUT A OUTPUT 6ns) r ...

Page 6

Figure 3. Typical Input Threshold, V (a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times out Figure 4. Typical Schmitt−Trigger Applications ( T− ...

Page 7

... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...

Page 8

... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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