74AUP1G58GM,132 NXP Semiconductors, 74AUP1G58GM,132 Datasheet

IC CONFIG MULTI-FUNC GATE 6-XSON

74AUP1G58GM,132

Manufacturer Part Number
74AUP1G58GM,132
Description
IC CONFIG MULTI-FUNC GATE 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G58GM,132

Logic Type
Configurable Multiple Function
Number Of Circuits
1
Number Of Inputs
3
Schmitt Trigger Input
Yes
Output Type
Single-Ended
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
6-XSON (Micropak™), SOT-886
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AUP1G58GM-H
74AUP1G58GM-H
935279961132
1. General description
2. Features and benefits
The 74AUP1G58 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,
NOR, XOR, inverter and buffer. All inputs can be connected to V
This device ensures a very low static and dynamic power consumption across the entire
V
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
The 74AUP1G58 has Schmitt trigger inputs making it capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals.
The inputs switch at different points for positive and negative-going signals. The difference
between the positive voltage V
hysteresis voltage V
CC
74AUP1G58
Low-power configurable multiple function gate
Rev. 4 — 11 October 2010
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
ESD protection:
Low static power consumption; I
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
I
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C
OFF
range from 0.8 V to 3.6 V.
OFF
HBM JESD22-A114F exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
circuitry provides partial power-down mode operation
circuitry disables the output, preventing the damaging backflow current through
H
.
T+
and the negative voltage V
CC
= 0.9 μA (maximum)
CC
T−
is defined as the input
CC
Product data sheet
or GND.
OFF
.

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74AUP1G58GM,132 Summary of contents

Page 1

Low-power configurable multiple function gate Rev. 4 — 11 October 2010 1. General description The 74AUP1G58 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74AUP1G58GW −40 °C to +125 °C 74AUP1G58GM −40 °C to +125 °C 74AUP1G58GF −40 °C to +125 °C 74AUP1G58GN −40 °C to +125 °C 74AUP1G58GS 4. Marking Table 2. Marking ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74AUP1G58 GND 001aad697 Fig 2. Pin configuration SOT363 6.2 Pin description Table 3. Pin description Symbol Pin B 1 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74AUP1G58 Product data sheet Low-power configurable multiple function gate ...

Page 4

... NXP Semiconductors 7.1 Logic configurations Table 5. Function selection table Logic function 2-input NAND 2-input NAND with both inputs inverted 2-input AND with inverted input 2-input NOR with inverted input 2-input OR 2-input OR with both inputs inverted 2-input XOR Buffer Inverter Fig 5. 2-input NAND gate or 2-input OR with both ...

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... NXP Semiconductors Fig 11. Inverter 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage ...

Page 6

... NXP Semiconductors 10. Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter = 25 °C T amb V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF ΔI additional power-off leakage OFF ...

Page 7

... NXP Semiconductors Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level output voltage OL I input leakage current I I power-off leakage current OFF ΔI additional power-off leakage OFF current I supply current CC ΔI additional supply current CC = −40 °C to +125 °C ...

Page 8

... NXP Semiconductors Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter ΔI additional power-off leakage OFF current I supply current CC ΔI additional supply current CC 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see ...

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... NXP Semiconductors Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions propagation delay A, B and see pF and power dissipation MHz capacitance [1] All typical values are measured at nominal V [ the same as t and PLH PHL [3] All specified values are the average typical values over all stated loads ...

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... NXP Semiconductors 12. Waveforms input Measurement points are given in V and V are typical output voltage drop that occur with the output load Fig 12. Input A, B and C to output Y propagation delay times Table 10. Measurement points Supply voltage Output 0.5 × 3.6 V 74AUP1G58 ...

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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 13. Test circuit for measuring switching times Table 11. ...

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... NXP Semiconductors 13. Transfer characteristics Table 12. Transfer characteristics Voltages are referenced to GND (ground = 0 V; for test circuit see Symbol Parameter Conditions V positive-going see T+ threshold voltage Figure negative-going see T− threshold voltage Figure hysteresis voltage ( Figure Figure 14. Waveforms transfer characteristics T− Fig 14. Transfer characteristic ...

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... NXP Semiconductors Fig 16. Typical transfer characteristics; V Fig 17. Typical transfer characteristics; V 74AUP1G58 Product data sheet Low-power configurable multiple function gate 240 I CC (μA) 160 0.4 0.8 1 1200 I CC (μA) 800 400 0 0 1.0 2 All information provided in this document is subject to legal disclaimers. ...

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... NXP Semiconductors 15. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.30 0.25 mm 0.1 0.8 0.20 0.10 OUTLINE VERSION IEC SOT363 Fig 18. Package outline SOT363 (SC-88) 74AUP1G58 Product data sheet scale 2.2 1.35 2 ...

Page 15

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 16

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 20 ...

Page 17

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 18

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 19

... NXP Semiconductors 16. Abbreviations Table 13. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 17. Revision history Table 14. Revision history Document ID Release date 74AUP1G58 v.4 20101011 • Modifications: Added type number 74AUP1G58GN (SOT1115/XSON6 package). ...

Page 20

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 21

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 19. Contact information For more information, please visit: For sales office addresses, please send an email to: 74AUP1G58 Product data sheet Low-power configurable multiple function gate 18 ...

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... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 7.1 Logic configurations . . . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 12 Waveforms ...

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