74HCT373DB,112 NXP Semiconductors, 74HCT373DB,112 Datasheet - Page 13

• Manufacturer Part Number: 74HCT373DB,112
• Description: IC OCTAL D TRANSP LATCH 20-SSOP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT373DB,112

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-SSOP
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 1
• Delay Time - Propagation: 33ns
• Current - Output High, Low: 6mA, 6mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: HCT
• Polarity: Non-Inverting
• High Level Output Current: - 6 mA
• Low Level Output Current: 6 mA
• Propagation Delay Time: 14 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2831-5; 935174850112

NXP Semiconductors
Table 8.
Voltages are referenced to GND (ground = 0 V); C
[1]
[2]
[3]
[4]
[5]
Table 9.
Voltages are referenced to GND (ground = 0 V); C
74HC_HCT373
Product data sheet
Symbol Parameter
t
Symbol Parameter
T
t
t
t
t
t
t
t
C
h
pd
en
dis
t
W
su
h
amb
PD
t
t
t
t
C
P
f
f
C
V
N = number of inputs switching;
∑(C
pd
en
dis
t
i
o
D
CC
PD
= input frequency in MHz;
L
= 25 °C
is the same as t
= output frequency in MHz;
is the same as t
is the same as t
= output load capacitance in pF;
= C
is the same as t
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
hold time
propagation delay
enable time
disable time
transition time
pulse width
set-up time
hold time
power dissipation capacitance
PD
Dynamic characteristics 74HC373
Dynamic characteristics 74HCT373
CC
× V
2
× f
CC
o
2
) = sum of outputs.
× f
THL
PLH
PZH
PLZ
i
× N + ∑(C
and t
and t
and t
and t
TLH
PHL
PZL
PHZ
.
L
.
.
.
× V
CC
2
× f
o
All information provided in this document is subject to legal disclaimers.
) where:
Conditions
Dn to LE; see
Dn to Qn; see
LE HIGH; see
per latch;
Conditions
LE to Qn; see
OE to Qn; see
OE to Qn; see
Qn; see
Dn to LE; see
Dn to LE; see
V
…continued
V
V
V
Rev. 4 — 3 September 2010
I
L
L
V
V
V
V
V
V
V
V
V
V
CC
CC
CC
= GND to (V
= 50 pF unless otherwise specified; for test circuit see
= 50 pF unless otherwise specified; for test circuit see
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 2.0 V
= 4.5 V
= 6.0 V
= 4.5 V
= 5 V; C
= 4.5 V
= 5 V; C
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
= 4.5 V
D
Figure 8
in μW).
Figure 11
Figure 11
Figure 11
Figure 9
Figure 8
Figure 9
Figure 10
Figure 10
L
L
CC
= 15 pF
= 15 pF
and
− 1.5 V)
Figure 9
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
[1]
[2]
[3]
[4]
[5]
Min
5
5
5
Min
-
-
-
-
-
-
-
16
12
4
-
Typ
-
-
-
Typ
17
14
16
13
19
18
5
4
6
−1
41
© NXP B.V. 2010. All rights reserved.
Figure
Figure
Max
-
-
-
Max
30
-
32
-
32
30
12
-
-
-
-
12.
12.
Unit
ns
ns
ns
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
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