74HCT373DB,112 NXP Semiconductors, 74HCT373DB,112 Datasheet - Page 5

• Manufacturer Part Number: 74HCT373DB,112
• Description: IC OCTAL D TRANSP LATCH 20-SSOP
• Manufacturer: NXP Semiconductors
• Series: 74HCTr

Specifications of 74HCT373DB,112

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-SSOP
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 1
• Delay Time - Propagation: 33ns
• Current - Output High, Low: 6mA, 6mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 8
• Logic Family: HCT
• Polarity: Non-Inverting
• High Level Output Current: - 6 mA
• Low Level Output Current: 6 mA
• Propagation Delay Time: 14 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-2831-5; 935174850112

NXP Semiconductors
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
[3]
[4]
74HC_HCT373
Product data sheet
Operating mode
Enable and read register
(transparent mode)
Latch and read register
Latch register and disable
outputs
Symbol
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
tot
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
I = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
X = don’t care;
Z = high-impedance OFF-state.
For DIP20 package: P
For SO20: P
For SSOP20 and TSSOP20 packages: P
For DHVQFN20 package: P
Function table
Limiting values
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
tot
derates linearly with 8 mW/K above 70 °C.
6.1 Function table
tot
derates linearly with 12 mW/K above 70 °C.
[1]
tot
Control
OE
L
L
H
derates linearly with 4.5 mW/K above 60 °C.
tot
All information provided in this document is subject to legal disclaimers.
derates linearly with 5.5 mW/K above 60 °C.
LE
H
L
X
Rev. 4 — 3 September 2010
Conditions
V
V
V
I
O
O
DIP20 package
SO20 package
SSOP20 package
TSSOP20 package
DHVQFN20 package
< −0.5 V or V
< −0.5 V or V
= −0.5 V to (V
I
l
Input
Dn
L
H
h
X
O
> V
CC
> V
CC
+ 0.5 V)
CC
+ 0.5 V
+ 0.5 V
74HC373; 74HCT373
Octal D-type transparent latch; 3-state
Internal latches
L
H
L
H
X
[1]
[2]
[3]
[3]
[4]
Min
−0.5
-
-
-
-
-
−65
-
-
-
© NXP B.V. 2010. All rights reserved.
Output
Qn
L
H
L
H
Z
Max
+7
±20
±20
±35
+70
−70
+150
750
500
500
500
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
mW
mW
mW
mW
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