PIC16F684-ISL

Manufacturer Part NumberPIC16F684-ISL
ManufacturerMicrochip Technology Inc.
PIC16F684-ISL datasheets
 


Specifications of PIC16F684-ISL

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PIC16F684
2.2.2.4
PIE1 Register
The PIE1 register contains the interrupt enable bits, as
shown in Register 2-4.
REGISTER 2-4:
PIE1 – PERIPHERAL INTERRUPT ENABLE REGISTER 1 (ADDRESS: 8Ch)
R/W-0
R/W-0
EEIE
ADIE
bit 7
bit 7
EEIE: EE Write Complete Interrupt Enable bit
1 = Enables the EE write complete interrupt
0 = Disables the EE write complete interrupt
bit 6
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
bit 5
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
bit 4
C2IE: Comparator 2 Interrupt Enable bit
1 = Enables the Comparator 2 interrupt
0 = Disables the Comparator 2 interrupt
bit 3
C1IE: Comparator 1 Interrupt Enable bit
1 = Enables the Comparator 1 interrupt
0 = Disables the Comparator 1 interrupt
bit 2
OSFIE: Oscillator Fail Interrupt Enable bit
1 = Enables the oscillator fail interrupt
0 = Disables the oscillator fail interrupt
bit 1
TMR2IE: Timer2 to PR2 Match Interrupt Enable bit
1 = Enables the Timer2 to PR2 match interrupt
0 = Disables the Timer2 to PR2 match interrupt
bit 0
TMR1IE: Timer1 Overflow Interrupt Enable bit
1 = Enables the Timer1 overflow interrupt
0 = Disables the Timer1 overflow interrupt
Legend:
R = Readable bit
-n = Value at POR
DS41202C-page 14
Note:
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
R/W-0
R/W-0
R/W-0
CCP1IE
C2IE
C1IE
OSFIE
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
Preliminary
R/W-0
R/W-0
TMR2IE
TMR1IE
bit 0
x = Bit is unknown
 2004 Microchip Technology Inc.