PIC16F684-ISL

Manufacturer Part NumberPIC16F684-ISL
ManufacturerMicrochip Technology Inc.
PIC16F684-ISL datasheets
 

Specifications of PIC16F684-ISL

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3.5
Clock Switching
The system clock source can be switched between
external and internal clock sources via software using
the System Clock Select (SCS) bit.
3.5.1
SYSTEM CLOCK SELECT (SCS) BIT
The System Clock Select (SCS) bit (OSCCON<0>)
selects the system clock source that is used for the
CPU and peripherals.
• When SCS = 0, the system clock source is
determined by configuration of the FOSC<2:0>
bits in the Configuration Word register (CONFIG).
• When SCS = 1, the system clock source is
chosen by the internal oscillator frequency
selected by the IRCF bits. After a Reset, SCS is
always cleared.
Note:
Any automatic clock switch, which may
occur
from
Two-Speed
Fail-Safe Clock Monitor, does not update
the SCS bit. The user can monitor the
OSTS (OSCCON<3>) to determine the
current system clock source.
3.5.2
OSCILLATOR START-UP TIME-OUT
STATUS BIT
The Oscillator Start-up Time-out Status (OSTS) bit
(OSCCON<3>) indicates whether the system clock is
running from the external clock source, as defined by
the FOSC bits, or from internal clock source. In
particular, OSTS indicates that the Oscillator Start-up
Timer (OST) has timed out for LP, XT or HS modes.
3.6
Two-Speed Clock Start-up Mode
Two-Speed Start-up mode provides additional power
savings by minimizing the latency between external
oscillator start-up and code execution. In applications
that make heavy use of the Sleep mode, Two-Speed
Start-up will remove the external oscillator start-up
time from the time spent awake and can reduce the
overall power consumption of the device.
This mode allows the application to wake-up from
Sleep, perform a few instructions using the INTOSC
as the clock source and go back to Sleep without
waiting for the primary oscillator to become stable.
Note:
Executing a SLEEP instruction will abort
the oscillator start-up time and will cause
the OSTS bit (OSCCON<3>) to remain
clear.
 2004 Microchip Technology Inc.
When the PIC16F684 is configured for LP, XT or HS
modes, the Oscillator Start-up Timer (OST) is enabled
(see
Section 3.3.1
(OST)”). The OST timer will suspend program execu-
tion until 1024 oscillations are counted. Two-Speed
Start-up mode minimizes the delay in code execution
by operating from the internal oscillator as the OST is
counting. When the OST count reaches 1024 and the
OSTS bit (OSCCON<3>) is set, program execution
switches to the external oscillator.
3.6.1
TWO-SPEED START-UP MODE
CONFIGURATION
Two-Speed Start-up mode is configured by the
following settings:
• IESO = 1 (CONFIG<10>) Internal/External Switch
Over bit.
• SCS = 0.
Start-up
or
• FOSC configured for LP, XT or HS mode.
Two-Speed Start-up mode is entered after:
• Power-on Reset (POR) and, if enabled, after
PWRT has expired, or
• Wake-up from Sleep.
If the external clock oscillator is configured to be any-
thing other than LP, XT or HS mode, then Two-Speed
Start-up is disabled. This is because the external clock
oscillator does not require any stabilization time after
POR or an exit from Sleep.
3.6.2
TWO-SPEED START-UP
SEQUENCE
1.
Wake-up from Power-on Reset or Sleep.
2.
Instructions begin execution by the internal
oscillator at the frequency set in the IRCF bits
(OSCCON<6:4>).
3.
OST enabled to count 1024 clock cycles.
4.
OST timed out, wait for falling edge of the
internal oscillator.
5.
OSTS is set.
6.
System clock held low until the next falling edge
of new clock (LP, XT or HS mode).
7.
System clock is switched to external clock
source.
Preliminary
PIC16F684
“Oscillator
Start-up
Timer
DS41202C-page 25