PIC16F684-ISL Microchip Technology Inc., PIC16F684-ISL Datasheet - Page 34

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PIC16F684-ISL

Manufacturer Part Number
PIC16F684-ISL
Description
Manufacturer
Microchip Technology Inc.
Datasheets

Specifications of PIC16F684-ISL

Case
N/A
Notes
NEW
Date_code
11+
PIC16F684
REGISTER 4-2:
TRISA – PORTA TRI-STATE REGISTER (ADDRESS: 85h)
U-0
bit 7
bit 7-6:
Unimplemented: Read as ‘0’
bit 5-0:
TRISA<5:0>: PORTA Tri-State Control bit
1 = PORTA pin configured as an input (tri-stated)
0 = PORTA pin configured as an output
Note 1: TRISA<3> always reads ‘1’.
2: TRISA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.
Legend:
R = Readable bit
-n = Value at POR
REGISTER 4-3:
WPUA – WEAK PULL-UP REGISTER (ADDRESS: 95h)
U-0
bit 7
bit 7-6
Unimplemented: Read as ‘0’
bit 5-4
WPUA<5:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
bit 3
Unimplemented: Read as ‘0’
bit 2-0
WPUA<2:0>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Note 1: Global RAPU must be enabled for individual pull-ups to be enabled.
2: The weak pull-up device is automatically disabled if the pin is in Output mode
(TRISA = 0).
3: The RA3 pull-up is enabled when configured as MCLR and disabled as an I/O in
the configuration word.
4: WPUA<5:4> always reads ‘1’ in XT, HS and LP OSC modes.
Legend:
R = Readable bit
-n = Value at POR
DS41202C-page 32
U-0
R/W-1
R/W-1
R-1
TRISA5
TRISA4
TRISA3
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
U-0
R/W-1
R/W-1
U-0
WPUA5
WPUA4
W = Writable bit
U = Unimplemented bit, read as ‘0’
‘1’ = Bit is set
‘0’ = Bit is cleared
Preliminary
R/W-1
R/W-1
R/W-1
TRISA2
TRISA1
TRISA0
bit 0
x = Bit is unknown
R/W-1
R/W-1
R/W-1
WPUA2
WPUA1
WPUA0
bit 0
x = Bit is unknown
 2004 Microchip Technology Inc.

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