HEF4043BP,652 NXP Semiconductors, HEF4043BP,652 Datasheet - Page 3

IC R/S LATCH 3-STATE QUAD 16DIP

HEF4043BP,652

Manufacturer Part Number
HEF4043BP,652
Description
IC R/S LATCH 3-STATE QUAD 16DIP
Manufacturer
NXP Semiconductors
Series
4000Br
Datasheet

Specifications of HEF4043BP,652

Logic Type
S-R Latch
Circuit
1:1
Output Type
Tri-State
Voltage - Supply
3 V ~ 15 V
Independent Circuits
4
Delay Time - Propagation
15ns
Current - Output High, Low
3mA, 3mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
16-DIP (0.300", 7.62mm)
Number Of Circuits
4
Logic Family
HEF4000
Polarity
Non-Inverting
High Level Output Current
- 3.6 mA
Low Level Output Current
32 mA
Propagation Delay Time
25 ns at 15 V
Supply Voltage (max)
15.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
933296670652
HEF4043BPN
HEF4043BPN
NXP Semiconductors
Table 2.
7. Functional description
Table 3.
[1]
8. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
HEF4043B_9
Product data sheet
Symbol
1Q to 4Q
1R to 4R
1S to 4S
OE
V
n.c.
V
Inputs
OE
L
H
H
H
Symbol
V
I
V
I
I
I
T
T
P
P
IK
OK
I/O
DD
stg
amb
SS
DD
DD
I
tot
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high impedance state.
For DIP16 package: P
For SO16 package: P
Pin description
Function table
Limiting values
Parameter
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
power dissipation
6.2 Pin description
tot
tot
derates linearly with 8 mW/K above 70 °C.
Pin
2, 9, 10, 1
3, 7, 11, 15
4, 6, 12, 14
5
8
13
16
derates linearly with 12 mW/K above 70 °C.
[1]
nS
X
L
H
L
Rev. 09 — 16 December 2009
Conditions
V
V
T
per output
amb
I
O
DIP16 package
SO16 package
< −0.5 V or V
common output enable input
Description
3-state buffered latch output
reset input (active HIGH)
set input (active HIGH)
ground supply voltage
not connected
supply voltage
< −0.5 V or V
−40 °C to +85 °C
nR
X
H
X
L
I
O
> V
> V
DD
DD
+ 0.5 V
+ 0.5 V
Quad R/S latch with 3-state outputs
[1]
[2]
Min
−0.5
-
−0.5
-
-
-
−65
−40
-
-
-
Output
nQ
Z
L
H
latched
HEF4043B
Max
V
+150
±10
±10
+18
±10
+85
750
500
100
DD
© NXP B.V. 2009. All rights reserved.
50
+ 0.5
Unit
V
mA
V
mA
mA
mA
°C
°C
mW
mW
mW
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