LC4256V-75T100I Lattice Semiconductor Corp., LC4256V-75T100I Datasheet
LC4256V-75T100I
Manufacturer Part Number
LC4256V-75T100I
Description
Manufacturer
Lattice Semiconductor Corp.
Datasheets
1.LC4064V-5T100I.pdf
(99 pages)
2.LC4064V-5T100I.pdf
(74 pages)
3.LC4064V-5T100I.pdf
(94 pages)
Specifications of LC4256V-75T100I
Case
QFP100
Date_code
03+
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LC4256V-75T100I
Manufacturer:
LATTICE
Quantity:
3
Company:
Part Number:
LC4256V-75T100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
November 2007
Features
■ High Performance
■ Ease of Design
■ Zero Power (ispMACH 4000Z) and Low
Table 1. ispMACH 4000V/B/C Family Selection Guide
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
Macrocells
I/O + Dedicated Inputs
t
t
t
f
Supply Voltages (V)
Pins/Package
1. 3.3V (4000V) only.
2. 128-I/O and 160-I/O configurations.
3. Use 256 ftBGA package for all new designs. Refer to PCN#14A-07 for 256 fpBGA package discontinuance.
PD
S
CO
MAX
(ns)
(ns)
(ns)
Power (ispMACH 4000V/B/C)
(MHz)
• f
• t
• Up to four global clock pins with programmable
• Up to 80 PTs per output
• Enhanced macrocells with individual clock,
• Up to four global OE controls
• Individual local OE control per I/O pin
• Excellent First-Time-Fit
• Fast path, SpeedLocking
• Wide input gating (36 input logic blocks) for fast
• Typical static current 10µA (4032Z)
• Typical static current 1.3mA (4000C)
• 1.8V core low dynamic power
• ispMACH 4000Z operational down to 1.6V V
clock polarity control
reset, preset and clock enable controls
path
counters, state machines and address decoders
MAX
PD
= 2.5ns propagation delay
= 400MHz maximum operating frequency
3.3/2.5/1.8V
4032V/B/C
30+2/32+4
ispMACH
44 TQFP
48 TQFP
400
2.5
1.8
2.2
32
TM
TM
and refit
Path, and wide-PT
Coolest Power
C
ispMACH 4000V/B/C/Z Family
3.3/2.5/1.8V
30+2/32+4/
4064V/B/C
100 TQFP
ispMACH
44 TQFP
48 TQFP
64+10
400
2.5
1.8
2.2
64
CC
64+10/92+4/
TM
3.3/2.5/1.8V
4128V/B/C
144 TQFP
100 TQFP
128 TQFP
ispMACH
1
96+4
■ Broad Device Offering
■ Easy System Integration
128
333
2.7
1.8
2.7
®
• Multiple temperature range support
• Superior solution for power sensitive consumer
• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
• Operation with 3.3V (4000V), 2.5V (4000B) or
• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI
• Hot-socketing
• Open-drain capability
• Input pull-up, pull-down or bus-keeper
• Programmable output slew rate
• 3.3V PCI compatible
• IEEE 1149.1 boundary scan testable
• 3.3V/2.5V/1.8V In-System Programmable
• I/O pins with fast setup path
• Lead-free package options
3.3V/2.5V/1.8V In-System Programmable
1
– Commercial: 0 to 90°C junction (T
– Industrial: -40 to 105°C junction (T
– Extended: -40 to 130°C junction (T
applications
1.8V (4000C/Z) supplies
interfaces
(ISP™) using IEEE 1532 compliant interface
• For AEC-Q100 compliant devices, refer to
LA-ispMACH 4000V/Z Automotive Data Sheet
64+10/96+14/
128+4/160+4
3.3/2.5/1.8V
256 ftBGA
4256V/B/C
144 TQFP
100 TQFP
176 TQFP
ispMACH
fpBGA
256
322
3.0
2.0
2.7
SuperFAST High Density PLDs
2, 3
2
1
/
128+4/192+4
3.3/2.5/1.8V
4384V/B/C
256 ftBGA/
176 TQFP
ispMACH
fpBGA
TM
384
322
3.5
2.0
2.7
3
Data Sheet DS1020
128+4/208+4
3.3/2.5/1.8V
4512V/B/C
256 ftBGA/
j
176 TQFP
DS1020_23.0
)
j
ispMACH
)
j
)
fpBGA
512
322
3.5
2.0
2.7
3
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