LC4256V-75T100I

Manufacturer Part NumberLC4256V-75T100I
ManufacturerLattice Semiconductor Corp.
LC4256V-75T100I datasheets
 

Specifications of LC4256V-75T100I

CaseQFP100Date_code03+
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
Page 1/99

Download datasheet (442Kb)Embed
Next
November 2007
Features
■ High Performance
• f
= 400MHz maximum operating frequency
MAX
• t
= 2.5ns propagation delay
PD
• Up to four global clock pins with programmable
clock polarity control
• Up to 80 PTs per output
■ Ease of Design
• Enhanced macrocells with individual clock,
reset, preset and clock enable controls
• Up to four global OE controls
• Individual local OE control per I/O pin
TM
• Excellent First-Time-Fit
TM
• Fast path, SpeedLocking
path
• Wide input gating (36 input logic blocks) for fast
counters, state machines and address decoders
■ Zero Power (ispMACH 4000Z) and Low
Power (ispMACH 4000V/B/C)
• Typical static current 10µA (4032Z)
• Typical static current 1.3mA (4000C)
• 1.8V core low dynamic power
• ispMACH 4000Z operational down to 1.6V V
Table 1. ispMACH 4000V/B/C Family Selection Guide
ispMACH
4032V/B/C
Macrocells
32
I/O + Dedicated Inputs
30+2/32+4
t
(ns)
2.5
PD
t
(ns)
1.8
S
t
(ns)
2.2
CO
f
(MHz)
400
MAX
Supply Voltages (V)
3.3/2.5/1.8V
Pins/Package
44 TQFP
48 TQFP
1. 3.3V (4000V) only.
2. 128-I/O and 160-I/O configurations.
3. Use 256 ftBGA package for all new designs. Refer to PCN#14A-07 for 256 fpBGA package discontinuance.
© 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand
or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
www.latticesemi.com
ispMACH 4000V/B/C/Z Family
®
3.3V/2.5V/1.8V In-System Programmable
Coolest Power
C
TM
■ Broad Device Offering
• Multiple temperature range support
– Commercial: 0 to 90°C junction (T
– Industrial: -40 to 105°C junction (T
– Extended: -40 to 130°C junction (T
■ Easy System Integration
• Superior solution for power sensitive consumer
applications
• Operation with 3.3V, 2.5V or 1.8V LVCMOS I/O
• Operation with 3.3V (4000V), 2.5V (4000B) or
1.8V (4000C/Z) supplies
and refit
• 5V tolerant I/O for LVCMOS 3.3, LVTTL, and PCI
Path, and wide-PT
interfaces
• Hot-socketing
• Open-drain capability
• Input pull-up, pull-down or bus-keeper
• Programmable output slew rate
• 3.3V PCI compatible
• IEEE 1149.1 boundary scan testable
• 3.3V/2.5V/1.8V In-System Programmable
(ISP™) using IEEE 1532 compliant interface
• I/O pins with fast setup path
CC
• Lead-free package options
ispMACH
ispMACH
4064V/B/C
4128V/B/C
64
128
30+2/32+4/
64+10/92+4/
64+10
96+4
2.5
2.7
1.8
1.8
2.2
2.7
400
333
3.3/2.5/1.8V
3.3/2.5/1.8V
44 TQFP
48 TQFP
100 TQFP
100 TQFP
128 TQFP
1
144 TQFP
1
SuperFAST High Density PLDs
TM
Data Sheet DS1020
• For AEC-Q100 compliant devices, refer to
LA-ispMACH 4000V/Z Automotive Data Sheet
ispMACH
ispMACH
4256V/B/C
4384V/B/C
256
384
64+10/96+14/
128+4/192+4
128+4/160+4
3.0
3.5
2.0
2.0
2.7
2.7
322
322
3.3/2.5/1.8V
3.3/2.5/1.8V
100 TQFP
1
144 TQFP
176 TQFP
176 TQFP
2
256 ftBGA
/
256 ftBGA/
2, 3
3
fpBGA
fpBGA
)
j
)
j
)
j
ispMACH
4512V/B/C
512
128+4/208+4
3.5
2.0
2.7
322
3.3/2.5/1.8V
176 TQFP
256 ftBGA/
3
fpBGA
DS1020_23.0