MC14094BDR2G ON Semiconductor, MC14094BDR2G Datasheet

IC SHIFT REGSTR 8BIT CMOS 16SOIC

MC14094BDR2G

Manufacturer Part Number
MC14094BDR2G
Description
IC SHIFT REGSTR 8BIT CMOS 16SOIC
Manufacturer
ON Semiconductor
Series
4000Br
Type
Not Requiredr
Datasheet

Specifications of MC14094BDR2G

Logic Type
Shift Register
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
8
Function
Serial to Parallel
Voltage - Supply
3 V ~ 18 V
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Counting Sequence
Serial to Serial/Parallel
Number Of Circuits
2
Logic Family
MC14
Propagation Delay Time
840 ns, 390 ns, 270 ns
Supply Voltage (max)
18 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3 V to 18 V
Technology
CMOS
Number Of Elements
1
Number Of Bits
8
Logical Function
Shift Register
Operating Supply Voltage (typ)
3.3/5/9/12/15V
Package Type
SOIC
Operating Temp Range
-55C to 125C
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
18V
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC14094BDR2GOS
MC14094BDR2GOS
MC14094BDR2GOSTR

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MC14094B
8-Stage Shift/Store Register
with Three-State Outputs
for each stage and a 3−state output from each latch.
seventh stage to two serial outputs. The Q
high−speed cascaded systems. The Q
following negative clock transition for use in low−speed cascaded systems.
transition of the strobe input. Data propagates through the latch while
strobe is high.
are placed in the high−impedance state by a logic Low on Output Enable.
Features
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2009
September, 2009 − Rev. 7
Symbol
V
I
The MC14094B combines an 8−stage shift register with a data latch
Data is shifted on the positive clock transition and is shifted from the
Data from each stage of the shift register is latched on the negative
Outputs of the eight data latches are controlled by 3−state buffers which
in
in
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
Schottky TTL Load Over the Rated Temperature Range
Negative Clock Transitions
3−State Outputs
Capable of Driving Two Low−Power TTL Loads or One Low−Power
Input Diode Protection
Data Latch
Dual Outputs for Data Out on Both Positive and
Useful for Serial−to−Parallel Data Conversion
Pin−for−Pin Compatible with CD4094B
These are Pb−Free Devices*
V
T
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
P
, V
, I
T
T
DD
stg
D
A
L
out
out
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
SS
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8−Second Soldering)
or V
v (V
DD
in
). Unused outputs must be left open.
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
S
output data is shifted on the
in
S
and V
−0.5 to V
output data is for use in
SS
−0.5 to +18.0
−55 to +125
−65 to +150
out
)
Value
± 10
should be constrained
500
260
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G or G
http://onsemi.com
CASE 751B
CASE 948F
DT SUFFIX
TSSOP−16
SOEIAJ−16
D SUFFIX
CASE 648
CASE 966
P SUFFIX
SOIC−16
F SUFFIX
PDIP−16
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
Publication Order Number:
16
1
16
16
16
1
1
DIAGRAMS
1
MARKING
MC14094BCP
AWLYYWWG
MC14094B
AWLYWW
MC14094B/D
14094BG
ALYWG
ALYWG
094B
14
G

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MC14094BDR2G Summary of contents

Page 1

... ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Publication Order Number: MC14094B/D 14 ...

Page 2

... At the positive clock edge, information in the 7th shift register stage is transferred to Q8 and Q ORDERING INFORMATION Device MC14094BCPG MC14094BDG MC14094BDR2G MC14094BDTR2G MC14094BFG MC14094BFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS Î Î Î Î Î ...

Page 5

O.E. DATA ST CLOCK REGISTER STAGE 1 CLOCK 2 * SERIAL CLOCK DATA IN CLOCK REGISTER STAGE 2 OUTPUT ENABLE 3 REGISTER STAGE 3 4 REGISTER STAGE 4 5 REGISTER STAGE 5 6 REGISTER STAGE 6 7 ...

Page 6

WH 3 CLOCK 50 DATA IN STROBE 1 OUTPUT 15 ENABLE t t PLH PHL 90% 90% Q1 ³ 10% 10 TLH THL PLH Q′ 10 ...

Page 7

0.25 (0.010) M −A− −T− SEATING PLANE 0.25 (0.010 PACKAGE DIMENSIONS PDIP−16 P ...

Page 8

K 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) −T− SEATING D PLANE 16X 0.36 PACKAGE DIMENSIONS TSSOP−16 DT SUFFIX CASE ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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