MC14094BCPG ON Semiconductor, MC14094BCPG Datasheet

MC14094BCPG

Manufacturer Part Number

MC14094BCPG

Description

IC SHIFT REGISTER 8STAGE 16-DIP

Manufacturer

ON Semiconductor

Series

4000Br

Type

Not Requiredr

Datasheets

1.MC14094BDG.pdf (9 pages)

2.MC14094BCPG.pdf (5 pages)

Specifications of MC14094BCPG

Logic Type

Shift Register

Output Type

Standard

Number Of Elements

Number Of Bits Per Element

Function

Serial to Parallel

Voltage - Supply

3 V ~ 18 V

Operating Temperature

-55°C ~ 125°C

Mounting Type

Through Hole

Package / Case

16-DIP (0.300", 7.62mm)

Technology

CMOS

Number Of Elements

Number Of Bits

Logic Family

4000

Logical Function

Shift Register

Operating Supply Voltage (typ)

3.3/5/9/12/15V

Package Type

PDIP

Propagation Delay Time

840ns

Operating Temp Range

-55C to 125C

Operating Supply Voltage (min)

Operating Supply Voltage (max)

18V

Operating Temperature Classification

Military

Mounting

Through Hole

Pin Count

Counting Sequence

Serial to Serial/Parallel

Number Of Circuits

Supply Voltage (max)

18 V

Maximum Operating Temperature

+ 125 C

Minimum Operating Temperature

- 55 C

Mounting Style

Through Hole

Operating Supply Voltage

3 V to 18 V

Circuit Type

Low-Power Schottky

Current, Supply

600 μA

Function Type

8-Stages

Logic Function

Special Features

Tri-State

Temperature, Operating, Range

-55 to +125 °C

Voltage, Supply

3 to 18 VDC

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

MC14094BCPGOS

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

MC14094BCPG

Manufacturer:

Quantity:

12 400

Current page: 1 of 9
Download datasheet (174Kb)

MC14094B

8-Stage Shift/Store Register

with Three-State Outputs

for each stage and a 3−state output from each latch.

seventh stage to two serial outputs. The Q

high−speed cascaded systems. The Q

following negative clock transition for use in low−speed cascaded systems.

transition of the strobe input. Data propagates through the latch while

strobe is high.

are placed in the high−impedance state by a logic Low on Output Enable.

Features

•

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. Temperature Derating:

static voltages or electric fields. However, precautions must be taken to avoid

applications of any voltage higher than maximum rated voltages to this

high−impedance circuit. For proper operation, V

to the range V

(e.g., either V

MAXIMUM RATINGS

September, 2009 − Rev. 7

Symbol

The MC14094B combines an 8−stage shift register with a data latch

Data is shifted on the positive clock transition and is shifted from the

Data from each stage of the shift register is latched on the negative

Outputs of the eight data latches are controlled by 3−state buffers which

This device contains protection circuitry to guard against damage due to high

Unused inputs must always be tied to an appropriate logic voltage level

Schottky TTL Load Over the Rated Temperature Range

Negative Clock Transitions

3−State Outputs

Capable of Driving Two Low−Power TTL Loads or One Low−Power

Input Diode Protection

Data Latch

Dual Outputs for Data Out on Both Positive and

Useful for Serial−to−Parallel Data Conversion

Pin−for−Pin Compatible with CD4094B

These are Pb−Free Devices*

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

, V

, I

stg

out

DC Supply Voltage Range

Input or Output Voltage Range

Input or Output Current

Power Dissipation, per Package

Ambient Temperature Range

Storage Temperature Range

Lead Temperature

(DC or Transient)

(DC or Transient) per Pin

(Note 1)

(8−Second Soldering)

or V

v (V

). Unused outputs must be left open.

Parameter

or V

(Voltages Referenced to V

out

) v V

output data is shifted on the

and V

−0.5 to V

output data is for use in

−0.5 to +18.0

−55 to +125

−65 to +150

out

)

Value

± 10

should be constrained

500

260

+ 0.5

Unit

°C

See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

*For additional information on our Pb−Free strategy

and soldering details, please download the

ON Semiconductor Soldering and Mounting

Techniques Reference Manual, SOLDERRM/D.

ORDERING INFORMATION

WL, L

YY, Y

WW, W

G or G

http://onsemi.com

CASE 751B

CASE 948F

DT SUFFIX

TSSOP−16

SOEIAJ−16

D SUFFIX

CASE 648

CASE 966

P SUFFIX

SOIC−16

F SUFFIX

PDIP−16

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb−Free Indicator

Publication Order Number:

DIAGRAMS

MARKING

MC14094BCP

AWLYYWWG

MC14094B

AWLYWW

MC14094B/D

14094BG

ALYWG

094B

Related parts for MC14094BCPG

MC14094BCPG Summary of contents

Page 1

... ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Publication Order Number: MC14094B/D 14 ...

Page 2

... Z = High Impedance * At the positive clock edge, information in the 7th shift register stage is transferred to Q8 and Q ORDERING INFORMATION Device MC14094BCPG MC14094BDG MC14094BDR2G MC14094BDTR2G MC14094BFG MC14094BFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS Î Î Î Î Î ...

Page 5

O.E. DATA ST CLOCK REGISTER STAGE 1 CLOCK 2 * SERIAL CLOCK DATA IN CLOCK REGISTER STAGE 2 OUTPUT ENABLE 3 REGISTER STAGE 3 4 REGISTER STAGE 4 5 REGISTER STAGE 5 6 REGISTER STAGE 6 7 ...

Page 6

WH 3 CLOCK 50 DATA IN STROBE 1 OUTPUT 15 ENABLE t t PLH PHL 90% 90% Q1 ³ 10% 10 TLH THL PLH Q′ 10 ...

Page 7

0.25 (0.010) M −A− −T− SEATING PLANE 0.25 (0.010 PACKAGE DIMENSIONS PDIP−16 P ...

Page 8

K 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) −T− SEATING D PLANE 16X 0.36 PACKAGE DIMENSIONS TSSOP−16 DT SUFFIX CASE ...

Page 9

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...

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