74HC165PW,118 NXP Semiconductors, 74HC165PW,118 Datasheet - Page 4

IC 8BIT SHIFT REGISTER 16TSSOP

74HC165PW,118

Manufacturer Part Number
74HC165PW,118
Description
IC 8BIT SHIFT REGISTER 16TSSOP
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet

Specifications of 74HC165PW,118

Package / Case
16-TSSOP
Logic Type
Shift Register
Function
Parallel or Serial to Serial
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
8
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Counting Sequence
Serial/Parallel to Serial
Number Of Circuits
1
Logic Family
HC
Propagation Delay Time
16 ns
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4990-2
74HC165PW,118
74HC165PW-T
74HC165PW-T
935174530118

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC165PW,118
Manufacturer:
NXP Semiconductors
Quantity:
5 850
NXP Semiconductors
Table 2.
7. Functional description
Table 3.
[1]
74HC_HCT165_3
Product data sheet
Symbol
PL
CP
Q7
GND
Q7
DS
D0 to D7
CE
V
Operating modes
parallel load
serial shift
hold “do nothing”
CC
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
q = state of the referenced output one set-up time prior to the LOW-to-HIGH clock transition;
X = don’t care;
= LOW-to-HIGH clock transition.
Pin description
Function table
Pin
1
2
7
8
9
10
11, 12, 13, 14, 3, 4, 5, 6
15
16
6.2 Pin description
Inputs
PL
L
L
H
H
H
H
H
H
[1]
CE
X
X
L
L
H
X
CP
X
X
L
L
X
H
Description
asynchronous parallel load input (active LOW)
clock input (LOW-to-HIGH edge-triggered)
complementary output from the last stage
ground (0 V)
serial output from the last stage
serial data input
parallel data inputs (also referred to as Dn)
clock enable input (active LOW)
positive supply voltage
Rev. 03 — 14 March 2008
DS
X
X
l
h
l
h
X
X
D0 to D7 Q0
L
H
X
X
X
X
X
X
74HC165; 74HCT165
8-bit parallel-in/serial out shift register
Qn registers
L
H
L
H
L
H
q0
q0
Q1 to Q6 Q7
L to L
H to H
q0 to q5
q0 to q5
q0 to q5
q0 to q5
q1 to q6
q1 to q6
Outputs
L
H
q6
q6
q6
q6
q7
q7
© NXP B.V. 2008. All rights reserved.
Q7
H
L
q6
q6
q6
q6
q7
q7
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