MT46H32M32LFCM-6 IT Micron Semiconductor Products, MT46H32M32LFCM-6 IT Datasheet

MT46H32M32LFCM-6 IT

Manufacturer Part Number

MT46H32M32LFCM-6 IT

Description

Manufacturer

Micron Semiconductor Products

Datasheet

1.MT46H32M32LFCM-6.pdf (87 pages)

Current page: 1 of 87
Download datasheet (5Mb)

Mobile DDR SDRAM

MT46H64M16LF – 16 Meg x 16 x 4 banks

MT46H32M32LF – 8 Meg x 32 x 4 banks

Features

• V

• Bidirectional data strobe per byte of data (DQS)

• Internal, pipelined double data rate (DDR)

• Differential clock inputs (CK and CK#)

• Commands entered on each positive CK edge

• DQS edge-aligned with data for READs; center-

• Four internal banks for concurrent operation

• Data masks (DM) for masking write data—one mask

• Programmable burst lengths: 2, 4, 8, or 16

• Concurrent auto precharge option is supported

• Auto refresh and self refresh modes

• 1.8V LVCMOS-compatible inputs

• On-chip temperature sensor to control self refresh

• Partial-array self refresh (PASR)

• Deep power-down (DPD)

• Status read register (SRR)

• Selectable output drive strength (DS)

• Clock stop capability

• 64ms refresh

Table 2:

PDF: 09005aef82ce3074/Source: 09005aef82cd0158

1gb_ddr_mobile_sdram_t48m_density__1.fm - Rev. G 07/08 EN

Options

• V

• Configuration

Architecture

Configuration

Refresh count

Row addressing

Column addressing

architecture; two data accesses per clock cycle

aligned with data for WRITEs

per byte

rate

– 1.8V/1.8V

– 64 Meg x 16 (16 Meg x 16 x 4 banks)

– 32 Meg x 32 (8 Meg x 32 x 4 banks)

DD/

Q = 1.70–1.95V

Configuration Addressing

Products and specifications discussed herein are subject to change by Micron without notice.

16 Meg x 16 x 4 banks

64 Meg x 16

16K (A[13:0])

1K (A[9:0])

Marking

64M16

32M32

Options

• Row-size option

• Plastic “green” package

• Timing – cycle time

• Power

• Operating temperature range

• Revision

Notes: 1. Contact factory for availability.

Table 1:

– JEDEC-standard option

– Reduced page-size option

– 60-ball VFBGA (10mm x 11.5mm)

– 90-ball VFBGA (10mm x 13mm)

– 5ns @ CL = 3

– 5.4ns @ CL = 3

– 6ns @ CL = 3

– 7.5ns @ CL = 3

– Standard I

– Low-power I

– Commercial (0° to +70°C)

– Industrial (–40°C to +85°C)

Speed Grade

8 Meg x 32 x 4 banks

32 Meg x 32

Micron Technology, Inc., reserves the right to change products or specifications without notice.

8K (A[12:0])

1K (A[9:0])

2. Only available for x16 configuration.

3. Only available for x32 configuration.

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1Gb: x16, x32 Mobile DDR SDRAM

(continued)

Key Timing Parameters (CL = 3)

2/I

Clock Rate (MHz)

2/I

200

185

166

133

Reduced Page-Size Option

8 Meg x 32 x 4 banks

32 Meg x 32

16K (A[13:0])

512 (A[8:0])

Access Time

Marking

5.0ns

5.5ns

6.0ns

Features

None

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