CS5101A-JL8 Cirrus Logic, Inc., CS5101A-JL8 Datasheet

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CS5101A-JL8

Manufacturer Part Number
CS5101A-JL8
Description
Manufacturer
Cirrus Logic, Inc.
Datasheets

Specifications of CS5101A-JL8

Pack_quantity
40
Comm_code
85423990
Lead_time
994

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
CS5101A-JL8
Manufacturer:
CRYSTAL
Quantity:
5 510
Part Number:
CS5101A-JL8
Manufacturer:
CRYSTAL
Quantity:
140
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Features
http://www.cirrus.com
Monolithic CMOS A/D Converters
Ultra-low Distortion
Conversion Time
Linearity Error:
Self-calibration Maintains Accuracy
Low Power Consumption
– Inherent Sampling Architecture
– 2-channel Input Multiplexer
– Flexible Serial Output Port
– S/(N+D): 92 dB
– TDH: 0.001%
– CS5101A: 8µs
– CS5102A: 40 µs
– Guaranteed No Missing Codes
– Accurate Over Time & Temperature
– CS5101A: 320 mW
– CS5102A: 44 mW
I
16-bit, 100 kSps / 20 kSps A/D Converters
REFBUF
CLKIN
AGND
XOUT
CH1/2
VREF
AIN1
AIN2
±
0.001% FS
HOLD SLEEPRST
3
4
21
20
19
24
13
22
12
Generator
VA+
28
Clock
+
+
+
-
-
-
25
2
STBY
VA-
5
Copyright © Cirrus Logic, Inc. 2006
23
CODE BP/UP
16
Calibration
(All Rights Reserved)
Control
SRAM
DGND
16-Bit Charge
Redistribution
17
6
CRS/FIN
DAC
The CS5101A and CS5102A are 16-bit monolithic
CMOS analog-to-digital converters (ADCs) capable of
100 kSps (5101A) and 20 kSps (5102A) throughput. The
CS5102A’s low power consumption of 44mW, coupled
with a power-down mode, makes it particularly suitable
for battery-powered operation.
On-chip self-calibration circuitry achieves nonlinearity of
±0.001% of FS and guarantees 16-bit, no missing codes
over the entire specified temperature range. Superior lin-
earity also leads to 92 dB S/(N+D) with harmonics below
-100 dB. Offset and full-scale errors are minimized dur-
ing the calibration cycle, eliminating the need for external
trimming.
The CS5101A and CS5102A each consist of a 2-chan-
nel input multiplexer, DAC, conversion and calibration
microcontroller, clock generator, comparator, and serial
communications port. The inherent sampling architec-
ture of the device eliminates the need for an external
track-and-hold amplifier.
The converters’ 16-bit data is output in serial form with
either binary or two’s complement coding. Three output
timing modes are available for easy interfacing to micro-
controllers and shift registers. Unipolar and bipolar input
ranges are digitally selectable
ORDERING INFORMATION
See
10
Description
VD-
TRK1 TRK2 SSH/SDLSDATA
1
“Ordering Information” on page
8
Microcontroller
9
VD+
+
-
Comparator
7
11
15
26
14
27
18
SCLK
TEST
SCKMOD
OUTMOD
38.
CS5101A
CS5102A
JAN ‘06
DS45F6

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