CD74HCT597M96G4

Manufacturer Part NumberCD74HCT597M96G4
DescriptionIC SHIFT REGISTER 8BIT HS 16SOIC
ManufacturerTexas Instruments
Series74HCT
CD74HCT597M96G4 datasheets

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Specifications of CD74HCT597M96G4

Logic TypeShift RegisterOutput TypeStandard
Number Of Elements1Number Of Bits Per Element8
FunctionParallel to SerialVoltage - Supply4.5 V ~ 5.5 V
Operating Temperature-55°C ~ 125°CMounting TypeSurface Mount
Package / Case16-SOIC (3.9mm Width)Lead Free Status / RoHS StatusLead free / RoHS Compliant
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Data sheet acquired from Harris Semiconductor
SCHS191C
January 1998 - Revised October 2003
Features
• Buffered Inputs
• Asynchronous Parallel Load
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
= 30%, N
IL
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), V
= 2V (Min)
IL
IH
- CMOS Input Compatibility, I
l
Pinout
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
©
Copyright
2003, Texas Instruments Incorporated
CD54HC597, CD74HC597,
8-Bit Shift Register with Input Storage
Description
The ’HC597 and CD74HCT597 are high-speed silicon gate
CMOS devices that are pin-compatible with the LSTTL 597
devices. Each device consists of an 8-flip-flop input register
and an 8-bit parallel-in/serial-in, serial-out shift register. Each
register is controlled by its own clock. A “low” on the parallel
load input (PL) shifts parallel stored data asynchronously into
the shift register. A “low” master input (MR) clears the shift
o
o
C to 125
C
register. Serial input data can also be synchronously shifted
through the shift register when PL is high.
Ordering Information
PART NUMBER
CD54HC597F3A
CD74HC597E
= 30% of V
IH
CC
CD74HC597M
CD74HC597MT
CD74HC597M96
CD74HC597NSR
1 A at V
, V
OL
OH
CD74HCT597E
CD74HCT597M
CD74HCT597MT
CD74HCT597M96
NOTE: When ordering, use the entire part number. The suffixes 96
and R denote tape and reel. The suffix T denotes a small-quantity
reel of 250.
CD54HC597
(CERDIP)
CD74HC597
(PDIP, SOIC, SOP)
CD74HCT597
(PDIP, SOIC)
TOP VIEW
D1
1
16
V
CC
D2
2
15
D0
D3
3
14
D
S
D4
4
13
PL
D5
5
12
ST
CP
11
SH
D6
6
CP
D7
7
10
MR
GND
8
9
Q7
1
CD74HCT597
High-Speed CMOS Logic
o
TEMP. RANGE (
C)
PACKAGE
-55 to 125
16 Ld CERDIP
-55 to 125
16 Ld PDIP
-55 to 125
16 Ld SOIC
-55 to 125
16 Ld SOIC
-55 to 125
16 Ld SOIC
-55 to 125
16 Ld SOP
-55 to 125
16 Ld PDIP
-55 to 125
16 Ld SOIC
-55 to 125
16 Ld SOIC
-55 to 125
16 Ld SOIC

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CD74HCT597M96G4 Summary of contents

  • Page 1

    ... Pinout CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. © Copyright 2003, Texas Instruments Incorporated CD54HC597, CD74HC597, 8-Bit Shift Register with Input Storage Description The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin-compatible with the LSTTL 597 devices ...

  • Page 2

    CD54HC597, CD74HC597, CD74HCT597 Functional Diagram Clock Edge High Voltage Level Low Voltage Level Don’t Care ...

  • Page 3

    CD54HC597, CD74HC597, CD74HCT597 Absolute Maximum Ratings DC Supply Voltage -0. Input ...

  • Page 4

    CD54HC597, CD74HC597, CD74HCT597 DC Electrical Specifications (Continued) CONDITIONS PARAMETER SYMBOL V (V) I Quiescent Device Current GND HCT TYPES High Level Input Voltage Low Level Input Voltage High Level Output ...

  • Page 5

    CD54HC597, CD74HC597, CD74HCT597 Prerequisite for Switching Specifications PARAMETER SYMBOL Pulse Width Pulse Width Pulse Width Pulse Width Setup ...

  • Page 6

    CD54HC597, CD74HC597, CD74HCT597 Prerequisite for Switching Specifications PARAMETER SYMBOL Setup Time Setup Time Hold Time Hold ...

  • Page 7

    CD54HC597, CD74HC597, CD74HCT597 Switching Specifications Input PARAMETER SYMBOL PLH, PHL Output Transition Time TLH THL Input Capacitance C I Power Dissipation C PD Capacitance, (Notes 3, 4) NOTES: ...

  • Page 8

    CD54HC597, CD74HC597, CD74HCT597 Test Circuits and Waveforms 90% CLOCK INPUT 10% t H(H) DATA INPUT t SU(H) t TLH 90% OUTPUT t PLH t REM V CC SET, RESET 50% OR PRESET ...

  • Page 9

    CD54HC597, CD74HC597, CD74HCT597 Timing Diagram SHIFT CLOCK SH CP SERIAL DATE D S MASTER RESET MR PARALLEL LOAD PL STORAGE CLOCK PARALLEL DATA INPUTS ...

  • Page 10

    ... ACTIVE CD74HC597MTG4 ACTIVE CD74HC597NSR ACTIVE CD74HC597NSRE4 ACTIVE CD74HC597NSRG4 ACTIVE CD74HCT597E ACTIVE CD74HCT597EE4 ACTIVE CD74HCT597M ACTIVE CD74HCT597M96 ACTIVE CD74HCT597M96E4 ACTIVE CD74HCT597M96G4 ACTIVE CD74HCT597ME4 ACTIVE CD74HCT597MG4 ACTIVE CD74HCT597MT ACTIVE CD74HCT597MTE4 ACTIVE PACKAGE OPTION ADDENDUM Package Package Pins Package Type Drawing Qty CDIP J 16 ...

  • Page 11

    Orderable Device Status CD74HCT597MTG4 ACTIVE (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. ...

  • Page 12

    TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Type Drawing CD74HC597M96 SOIC D CD74HC597NSR SO NS CD74HCT597M96 SOIC D PACKAGE MATERIALS INFORMATION Pins SPQ Reel Reel A0 (mm) Diameter Width (mm) W1 (mm) 16 2500 330.0 ...

  • Page 13

    Device Package Type CD74HC597M96 SOIC CD74HC597NSR SO CD74HCT597M96 SOIC PACKAGE MATERIALS INFORMATION Package Drawing Pins SPQ Length (mm 2500 NS 16 2000 D 16 2500 Pack Materials-Page 2 19-Mar-2008 Width (mm) Height (mm) ...

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  • Page 19

    ... Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’ ...

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