CXA2074S Sony Corporation, CXA2074S Datasheet
CXA2074S
Available stocks
Related parts for CXA2074S
CXA2074S Summary of contents
Page 1
... Various built-in filter circuits greatly reduce external parts. • There are three systems for inputs and two systems for outputs, and each mode control is possible. Standard I/O Level [( ) is the pin No. for the CXA2074S.] • Input level COMPIN (Pin 17) AUX1-L/R (Pins 36 and 35) AUX2-L/R (Pins 38 and 37) • Output level ...
Page 2
... Pin Configuration (Top View) CXA2074Q AUX2 AUX2-L LPOUT-R 39 LPOUT-L 40 LPIN-R 41 LPIN BASSR1 44 BASSR2 45 BASSL1 46 BASSL2 47 TRER 48 CXA2074S – ...
Page 3
CXA2074Q/S ...
Page 4
CXA2074Q/S ...
Page 5
Pin Description Pin No. Pin Symbol voltage QFP SDIP BASSR1 44 1 4.0V (45) (47) BASSR2 45 2 4.0V BASSL1 46 3 4.0V BASSL2 47 4 4.0V TRER 48 5 4.0V TREL 1 6 4.0V LSOUT 4.0V LSOUT-L ...
Page 6
Pin No. Pin Symbol voltage QFP SDIP SDA 4 9 — 7.5k SCL 5 10 — DGND 6 11 — MAININ 8 12 4.0V MAINOUT 9 13 4.0V Equivalent circuit V CC 7.5k 35µ 4. ...
Page 7
Pin No. Pin Symbol voltage QFP SDIP 11 14 PCINT1 4. PCINT2 4. PLINT 5. COMPIN 4.0V Equivalent circuit V CC 147 14 30k (11) 22k V CC 147 15 (12) 10k 10k 2k ...
Page 8
Pin No. Pin Symbol voltage QFP SDIP 15 18 VGR 1.3V 11k IREF 1. GND — SAPTC 4. — CC Equivalent circuit 3k 147 19.4k 9. ...
Page 9
Pin No. Pin Symbol voltage QFP SDIP SUBOUT 21 23 4.0V STIN 22 24 4.0V 24 (22) SAPIN 25 27 4.0V NOISETC 23 25 3.0V SAPOUT 24 26 4.0V Equivalent circuit 2k 2k 10P 4k 580 14.4k 147 580 2k ...
Page 10
Pin No. Pin Symbol voltage QFP SDIP 4.0V 29 VEWGT 27 29 4.0V (27) VETC 28 30 1.7V VEOUT 30 31 4.0V Equivalent circuit 7.5k 147 28 (26) 580 147 580 8k 30k 8µ 20k ...
Page 11
Pin No. Pin Symbol voltage QFP SDIP VCAIN VCATC 1. VCAWGT 4.0V 2.9V 50µ AUX1-R 4. AUX1-L 4. AUX2-R 4.0V AUX2 4.0V Equivalent circuit V ...
Page 12
Pin No. Pin Symbol voltage QFP SDIP 39 39 LPOUT-R 4. LPOUT-L 4. LPIN-R 4. LPIN-L 4.0V 7 — NC — 10 — NC — 20 — NC — 29 — NC — 34 ...
Page 13
CXA2074Q/S ...
Page 14
CXA2074Q/S ...
Page 15
CXA2074Q/S ...
Page 16
I C BUS block items (SDA, SCL) No. 1 High level input voltage 2 Low level input voltage 3 High level input current 4 Low level input current 5 Low level output voltage SDA (Pin 9) during 3mA inflow ...
Page 17
Electrical Characteristics Measurement Circuit CXA2074Q SIGNAL SIGNAL SIGNAL SIGNAL GENE- GENE- GENE- GENE- RATOR RATOR RATOR RATOR C10 C12 4.7µ 4.7µ 4.7µ AUX2-R 38 AUX2-L C3 4.7µ 39 LPOUT-R C4 ...
Page 18
CXA2074Q/S ...
Page 19
I C BUS Register Data Standard Setting Values Number Classifi- Register of bits cation ATT 4 A VCO 6 A FILTER 6 A SPECTRAL 6 A WIDEBAND 6 A TEST- TEST1 1 T FST 1 T VOL-L ...
Page 20
CXA2074Q/S ...
Page 21
Adjustment Method (Adjust this IC through Tuner and IF when this IC is mounted on the set.) 1. ATT adjustment 1) TEST BIT is set to “TEST1 = 0” and “TEST-DA = 0”. 2) Input a 100Hz, 245mVrms sine wave ...
Page 22
Description of Operation [The pin numbers in parenthesis are for the CXA2074Q.] The US audio multiplexing system possesses the base band spectrum shown in Fig. 1. PEAK DEV kHz – 15kHz PLL (VCO ...
Page 23
TVSW 35 (AUX1-R) (Lch) (Rch) from MATRIX ( (MAIN) After the audio multiplexing signal input from COMPIN (Pin 17 (Pin 14)) passes through MVCA, the SAP signal and ...
Page 24
The variable de-emphasis circuit transmittance and VCA gain are respectively controlled by Each of effective value detection circuits. Each of the effective value detection circuits passes the input signal through a predetermined filter for weighting before the effective value of ...
Page 25
Register Specifications Slave address SLAVE RECEIVER SLAVE TRANSMITTER 80H (1000 0000) 81H (1000 0001) Register table SUB ADDRESS MSB LSB BIT7 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 Status Registers when TEST1 = 0 STA1 STA2 ...
Page 26
Description of Registers Control registers Register Number of bits Classification ATT 4 VCO 6 FILTER 6 SPECTRAL 6 WIDEBAND 6 TEST-DA 1 TEST1 1 FST 1 VOL-L 6 VOL-R 6 BASS 4 TREBLE 4 NRSW 1 FOMO 1 TVSW 1 ...
Page 27
Status registers Register Number of bits PONRES 1 STEREO 1 SAP 1 NOISE 1 FILADJ 1 Description of Control Registers ATT (4): Adjust the signal level input to COMPIN (Pin 17 (Pin 14)) to the standard input level (245mVrms). Variable ...
Page 28
TEST1 (1): Set filter adjustment mode Normal mode 1 = FILTER (STA5) adjustment mode In addition, the following outputs are present at Pins 40 and 39. LPOUT-L (Pin 40): SAP BPF OUT LPOUT-R (Pin 39): NR BPF OUT ...
Page 29
FEXT1 (1): Turn external input [1] to forced MONO Normal mode 1 = External input [1] is forced MONO. Input the same signal to both AUX1-L and AUX1-R. FEXT2 (1): Turn external input [2] to forced MONO 0 ...
Page 30
Description of Mode Control Priority ranking: M1/M2 > TVSW/EXT > TEST-DA > TEST1 > (NRSW & FOMO & SAPC) Mode control “Select dbx input and TV decoder output” Conditions: FOMO = 0 NRSW = 0 (MONO or ST output) • ...
Page 31
Decoder Output and Mode Control Table 1 (SAPC = 1) Mode detection Input signal mode MONO STEREO MONO & SAP ...
Page 32
Decoder Output and Mode Control Table 2 (SAPC = 0) Mode detection Input signal mode MONO STEREO MONO & SAP ...
Page 33
Mode Control Table 3 M1 TVSW 1 0 – ( (R) are selected in MATRIX TV (L): MONO, ST-L, SAP, (SAPBPFout, D/Aout) ...
Page 34
I C data Write (Write from I C controller to the IC) MSB SDA 1 2 SCL S Address MSB LSB HIZ DATA (n) ACK HIZ DATA ACK 2 • I ...
Page 35
Input level vs. Distortion characteristics 1 (MONO) Input signal: MONO (Pre-emphasis on), 1kHz 0dB = 100% modulation level 1 9V, 30kHz using LPF CC Measurement point: LPOUT-L/R 0.1 Standard level (100%) –10 0 Input level [dB] Input level ...
Page 36
Stereo LPF frequency characteristics –5 – Frequency [kHz] Main LPF and Sub LPF frequency characteristics –10 –20 –30 –40 – Frequency [kHz] SAP ...
Page 37
BASS-TREBLE characteristics BASS. MAX + –4 –8 –12 BASS. MIN 20 100 Frequency [Hz] Input: Output: LSOUT Volume characteristics 0 –20 –40 –60 –80 Input: AUX1, 2 1kHz, 490mVrms Output: LSOUT –100 0 F Control data VOL-L, ...
Page 38
... Package Outline Unit: mm CXA2074Q SONY CODE EIAJ CODE JEDEC CODE CXA2074S 42 1 SONY CODE EIAJ CODE JEDEC CODE 48PIN QFP (PLASTIC) 15.3 ± 0.4 + 0.4 12.0 – 0 0.15 0.8 0.3 – 0.1 ± 0. 0.35 2.2 – 0.15 PACKAGE STRUCTURE PACKAGE MATERIAL LEAD TREATMENT QFP-48P-L04 LEAD MATERIAL QFP048-P-1212-B ...