ACX306 SONY [Sony Corporation], ACX306 Datasheet
ACX306
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ACX306 Summary of contents
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... Type) NTSC/PAL Color LCD Panel Description The ACX306AK is a 3.86cm diagonal active matrix TFT-LCD panel addressed by low temperature poly- crystalline silicon transistors with built-in peripheral driving circuitry. This panel provides full-color representation for NTSC and PAL systems. In addition, RGB dots are arranged in a delta pattern ...
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... Block Diagram The panel block diagram is shown below. Level Shifter Common Voltage Boost, Negative Voltage Generation Circuit – 2 – COM ACX306AK 24 ...
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... SS Typ. Max. Unit 12.0 V 12.6 12.0 V — 15.0 V 16.3 –1.8 V –1.5 10 160 kΩ ACX306AK VSSG V DD Recommended voltage applied 1 F Cext/Rext example Zener diode (RD2.7UM is recommended) VDDG Recommended voltage applied 1 F example Zener diode. (RD4.3UM is recommended) ACX306AK ...
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... Clock input for H shift register drive Clock input for H shift register drive Uniformity improvement signal input Video signal (G) input to panel Video signal (R) input to panel Video signal (B) input to panel H shift register drive direction signal input Panel test output; no connection ACX306AK ...
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... Input REF (5) RGT, REF Input REF 350 1M 1M 175 – 5 – Signal line level shifter and shift register circuit V DD Level conversion circuit V DD Level conversion circuit V DD Level conversion circuit ACX306AK with a SS ...
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... COM Input (10) Cext/Rext Cext/Rext (11) TEST, TEST2 350 TEST (12) TESTL, TESTR V 800 Level conversion circuit 350 1M 4M TESTL TESTR – 6 – Level conversion circuit V DD Boost, Negative voltage generation circuit driver TEST2 ACX306AK ...
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... ACX306AK = 12V 25°C) DD Max. Unit 30 30 363 100 100 34 µs –34 100 100 100 100 ...
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... Horizontal Standard Timing HST HCK1 HCK2 FRP VCK EN WIDE 3.1 s 0.6 s 3.0 s 1.1 s 0.4 s 1.5 s – 8 – ACX306AK ...
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... HCKn duty cycle 50% 10% to1Hck = 0ns to2Hck = 0ns tfHst 50% 5 • HCKn duty cycle 50% to1Hck = 0ns to2Hck = 0ns 5 • HCKn duty cycle 50% 90% to1Hck = 0ns 10% to2Hck = 0ns tdHst = 333ns thHst = 0ns tfHckn • tdHst = 333ns thHst = 0ns 50% 90% 10% tfWide 50% 50% ACX306AK ...
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... Vertical Standard Timing NTSC 4:3 (in case of EVEN field) VST VCK FRP HST EN WIDE – 10 – ACX306AK ...
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... VCK duty cycle 50% to1Vck = 0ns 10% to2Vck = 0ns tfVst 50% • VCK duty cycle 50% to1Vck = 0ns 50% to2Vck = 0ns thVst • VCK duty cycle 90% 50% to1Vck = 0ns 10% to2Vck = 0ns tdVst = 32µs thVst = –32µs • VCK duty cycle 90% 50% to1Vck = 0ns to2Vck = 0ns trEn 50% twEn ACX306AK ...
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... Symbol Min. Typ. Max. PWR25 — PWR60 — — 75 Symbol Min. Typ. Max. Rin1 0.5 1 – 12 – ACX306AK Unit Conditions µA HCK1: actual driving µA HCK2: actual driving µA HST = GND µA RGT = GND µA REF = VIH/2 Unit Conditions pF pF µ ...
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... F 7 YT1 8 60° ≥ 0° CTK 11 25°C – 13 – ACX306AK (Ta = 25°C, NTSC mode) Min. Typ. Max. 200 — 100 180 100 6.0 6.5 — 0.595 0.625 0.655 0.310 0.340 0.370 0.240 0.270 0.300 ...
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... Using the TOPCON BM-5A luminance meter. Meter Using the Stanley E13585A inverter. E13585A DC6.0V Optical fiber Surface A Measure using the discrete LCD panel. Light Source Light Source Optical fiber Spectroscope Surface A = 4.0V. AC – 14 – Measurement Light Detector Equipment Surface A: See the Package Outline. = 0.5V. AC ACX306AK ...
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... AC G input B input 4.0 4.0 0.5 4.0 4.0 0.5 0.0 0.0 (Unit and 100 50 and V , 50RG 50BG and V 50R 50G 0 – 15 – ACX306AK – Signal amplitude [ 50RG V 50BG G raster R raster B raster V V 50R 50B V 50G V – Signal amplitude [V] AC ...
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... Vsig = 6.0 ± 4.0 or 6.0 ± 2.0 [V] (shown in the figure to the right) Vcom = 5.5V Input signal voltage (Waveform applied to measured pixels) 4.0V 0.5V 6.0V 0V Optical transmittance output waveform 100% 90% 10% 0% tON 50 that holds the maximum image retention, AC 4.0V 2.0V 6.0V 2.0V 0V Vsig waveform – 16 – ACX306AK t1 tOFF t2 ton toff [V] Black level White level 4.0V ...
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... Cross talk is determined by the luminance differences between adjacent areas represented by Wi' and around the black window (Vsig = 4.0V/1V W2' W4' W3 W3' Wi' – Wi Cross talk value CTK = Wi – 17 – Normal ( = Left R Top Bottom Right Surface A 100 [%] ACX306AK 100 [%] ...
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... 490 494 – 18 – Gate SW Gate ACX306AK ...
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... Vertical display period (DWN: low level) VD VST VCK (3) Horizontal display period (RGT: high level) BLK HST HCK1 HCK2 2 1 Vertical display period 240H (14.5ms Vertical display period 240H (14.5ms) 165 164 166 Horizontal display period (54.6 s) – 19 – ACX306AK 490 pixels to 240 239 239 240 ...
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... Two methods are applied for the delaying procedure: Sample-and-hold and Delay circuit. These two block diagrams are as follows. The ACX306AK has a right/left inversion function. The following phase relationship diagram indicates the phase setting for right scan (RGT = high level). For left scan (RGT = low level), the phase setting should be inverted for the B and G signals ...
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... CXA3522R Serial data +12.0V +3.0V PSIG Cext/Rext RED GREEN BLUE COM HST HCK1 HCK2 LCD Panel VST ACX306AK VCK DWN EN RGT REF WIDE – 21 – ACX306AK Rext Cext See page 3 for the value setting. Zener diode RD4.3UM VDDG 1 F +12.0V Zener diode RD2.7UM VSSG 1 F ...
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... Do not drop the panel not twist or bend the panel or panel frame. d) Keep the panel away from heat sources not dampen the panel with water or other solvents. f) Avoid storage or use the panel at high temperatures or high humidity, as this may result in damage. – 22 – ACX306AK ...
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... ACX306AK Sony Corporation ...