OCX160-PBI ETC [List of Unclassifed Manufacturers], OCX160-PBI Datasheet

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OCX160-PBI

Manufacturer Part Number
OCX160-PBI
Description
OCX160 Crosspoint Switch
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
I-Cube, Inc.
Features
Description
The OCX™ family of SRAM-based devices are non-blocking n X n digital crosspoint switches capable of data
rates of 667 Megabits per second per port. The I/O ports are fixed as either input or output ports. The input ports
support flow-through mode only. The output ports are individually programmable to operate in either flow-
through (asynchronous) or registered (synchronous) mode. Each output register may be clocked by a global
clock or a next neighbor clock source.
The patented ActiveArray provides greater density, superior performance, and greater flexibility compared to a
traditional n:1 multiplexer architecture. The OCX devices support various operating modes covering one input to
one output at a time as well as one input to many outputs, plus a special broadcast mode to program one input to
all outputs while maintaining maximum data rates. In all modes data integrity and connections are maintained on
all unchanged data paths.
The RapidConfigure parallel interface allows fast configuration of both the Output Buffers and the switch
matrix. Readback is supported for device test and verification purposes. The OCX160 also supports the industry
standard JTAG (IEEE 1149.1) interface for boundary scan testing. The JTAG interface can also be used to
download configuration data to the device and readback data. A functional block diagram of the OCX160 is
shown in Figure 1.
Applications
• 667 Mb/s port data bandwidth, >50Gb/s aggregate bandwidth
• Low power CMOS, 2.5V and 3.3V power supply
• SRAM-based, in-system programmable
• 160 configurable I/O ports
• Non-blocking switch matrix
• SONET/SDH and DWDM
• Digital Cross-Connects
– 80 dedicated differential input ports
– 80 dedicated differential output ports
– Supports LVDS and LVPECL I/O
– LVTTL control interface
– Output Enable control for all outputs
– Patented ActiveArray™ matrix for superior performance
– Double-buffered configuration RAM cells for simultaneous
– ImpliedDisconnect™ function for single cycle disconnect/
connect
global updates
RapidConfigure
Signals
UPDATE#
RC_EN#
RCA[6:0]
RCB[6:0]
RCI[3:0]
RCO[4:0] 5
RC_CLK#
IN[79:0]
160
7
4
7
Figure 1 OCX160 Functional Block Diagram
Buffers
Input
[Rev. 1.6] 2/20/01
• System Backplanes and Interconnects
• High Speed Test Equipment
OCX160 Crosspoint Switch
Programming Logic
Configuration and
Switch Matrix
Crosspoint
80 x 80
Preliminary Data Sheet
• Full Broadcast and multicast capability
• Registered and flow-through data modes
• RapidConfigure™ parallel interface for
• JTAG serial interface for configuration and
• 420 BGA package with 1.27mm ball spacing
– One-to-One and One-to-Many connections
– Special broadcast mode routes one input to
– 333 MHz synchronous mode
– 667 Mb/s asynchronous mode
– Low jitter and signal skew
– Low duty cycle distortion
configuration and readback
Boundary Scan testing
all outputs at maximum data rate
Output
Buffers
160
OUT[79:0]
2
TCK
TMS
TDI
TRST#
TDO
HW_RST#
CLK
OE#
• ATM Switch Cores
• Video Switching
Signals
JTAG
1

Related parts for OCX160-PBI

OCX160-PBI Summary of contents

Page 1

... Readback is supported for device test and verification purposes. The OCX160 also supports the industry standard JTAG (IEEE 1149.1) interface for boundary scan testing. The JTAG interface can also be used to download configuration data to the device and readback data. A functional block diagram of the OCX160 is shown in Figure 1. ...

Page 2

... OCX160 Crosspoint Switch—Preliminary Data Sheet 2 (This page intentionally left blank) [Rev. 1.6] 2/20/01 I-Cube, Inc. ...

Page 3

... OCX160 Crosspoint Switch—Preliminary Data Sheet 1. Introduction ........................................................................................................................... 7 1.1 Input and Output Buffers...................................................................................................... 8 1.1.1 Input and Output Port Function Mode ........................................................................... 8 1.1.2 Broadcast Mode ............................................................................................................. 9 1.2 Output Buffer Configuration ................................................................................................ 9 1.2.1 Output Control Signals................................................................................................... 9 1.2.2 Neighboring Output Port as a Clock Source .................................................................. 9 1.3 RapidConfigure Interface ....................................................................................................11 1.3.1 RapidConfigure Programming Instructions.................................................................. 11 1.3.2 ImpliedDisconnect ....................................................................................................... 13 1.4 JTAG Configuration Controller.......................................................................................... 14 1.4.1 JTAG Interface............................................................................................................. 14 1 ...

Page 4

... OCX160 Crosspoint Switch—Preliminary Data Sheet 4.3 Pin Capacitance ................................................................................................................. 25 4.4 DC Electrical Specifications............................................................................................... 26 4.5 AC Electrical Specifications............................................................................................... 27 4.6 Timing Diagrams................................................................................................................ 28 5. Package and Pinout ............................................................................................................. 32 5.1 Package Pinout ................................................................................................................... 32 5.2 Pinout by Ball Sequence..................................................................................................... 33 5.3 Pinout by Ball Name .......................................................................................................... 36 5.4 Package Dimensions........................................................................................................... 38 5.5 Package Thermal Characteristics........................................................................................ 39 6. Power Consumption ............................................................................................................ 40 6.1 Power for LVDS I/O .......................................................................................................... 40 6.2 Power for LVPECL I/O ..................................................................................................... 41 7 ...

Page 5

... Typical Performance LVDS mode ..................................................................................................... 31 Figure 19 Typical Performance LVPECL mode................................................................................................. 31 Figure 20 OCX160 Package Pinout .................................................................................................................... 32 Figure 21 OCX160 Package—Bottom, Top and Side Views ............................................................................. 38 Figure 22 Power Consumption Diagram for the OCX160 using LVDS............................................................. 40 Figure 23 Power Consumption Diagram for the OCX160 using LVPECL........................................................ 41 I-Cube, Inc. Figures [Rev. 1.6] 2/20/01 5 ...

Page 6

... OCX160 Crosspoint Switch—Preliminary Data Sheet Table 1 Summary for Programmable I/O Attributes for OCX160 ................................................................. 8 Table 2 Next Neighbor Outputs.................................................................................................................... 10 Table 3 RapidConfigure Programming Instructions .................................................................................... 11 Table 4 RCO[4:0] Readback Pin Assignment.............................................................................................. 13 Table 5 Programming an Output Buffer using RapidConfigure .................................................................. 13 Table 6 Mode Control Register .................................................................................................................... 14 Table 7 JTAG Input Format ......................................................................................................................... 16 Table 8 JTAG Instructions ...

Page 7

... Introduction The OCX160 is a differential crosspoint-switching device. The main functional block of the device is a Switch Matrix as shown in Figure 1. The Switch Matrix is a x-y structure supporting an input-to-output data flow. Figure 2 shows a conceptual view of the switch matrix with inputs connected to the horizontal trace and outputs to the vertical trace ...

Page 8

... Next Neighbor Clock Select Input and Output Buffer Configuration Summary for Programmable I/O Attributes for OCX160 I/O Port Function Input – The external signal is buffered from the Input Port pin to the corresponding Switch Matrix line. Output – The internal signal is buffered from the corresponding Switch Matrix line to the Output Port pin ...

Page 9

... The Global Update pin (UPDATE#) must be held high during Broadcast Mode. Asserting the UPDATE# pin returns the array to the previous program condition. 1.2 Output Buffer Configuration Every output port of the OCX160 can be configured as either a flow-through or registered output. In registered mode there are two clock sources that are available: • ...

Page 10

... OCX160 Crosspoint Switch—Preliminary Data Sheet Crosspoint Array Any Input Port (INx) Any Input Port (INy) Figure 4 The advantages of next neighbor clocking are: 1. Using next neighbor clocking in the registered output (RO) mode helps reduce the skew in outgoing data. 2. For a design with a large number of outputs switching simultaneously, next neighbor clocking mode is useful to stagger outputs for reduced board noise caused by simultaneous switching outputs ...

Page 11

... RapidConfigure Interface RapidConfigure (RC signal parallel interface that is used to program the OCX160 device. The 25 pins are allocated as follows: RCA[6:0] = RapidConfigure Address A. RCA are input pins. RCB[6:0] = RapidConfigure Address B. RCB are input pins. RCI[3:0] = RapidConfigure Instruction Bits RCO[4:0] = RapidConfigure Readback. RCO are output pins. ...

Page 12

... OCX160 Crosspoint Switch—Preliminary Data Sheet Table 3 RapidConfigure Programming Instructions (Continued) RCI[3:0] RCA[6:0] RCB[6:0] Cycle 0110 X X 0111 X Input Port Address 1000 Output Port Input Port Address Address 1001 Output Port Input Port Address Address 1010 Output Port Input Port ...

Page 13

... Thus, a connection change, i.e. breaking an existing connection and then making a new one, can be accomplished in one RapidConfigure cycle. I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet RCO[4:0] Readback Pin Assignment Signal/Function Connection Status connection (NC) — (default state at reset) ...

Page 14

... Mode Control Register Configuration The OCX160 contains a single bit Mode Control Register used to store user flags for RapidConfigure Enable (RCE). These are required for proper functioning of the device. The contents of this register can be changed using the JTAG interface and a special JTAG instruction. ...

Page 15

... TDI Mode Control Register - 1 Bits JTAG Address Register - 7 Bits TMS TCK Figure 5 I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Boundary Scan Register (189 378 Bits) JTAG Data Register - 1 Bit Bypass Register - 1 Bit Instruction Register - 16 Bits OCX160 JTAG Architecture [Rev. 1.6] 2/20/01 ...

Page 16

... OCX160 Crosspoint Switch—Preliminary Data Sheet 1.4.6 JTAG State Machine Test Logic Reset 1 0 Run Test/ 1 Idle 0 Figure 6 1.4.7 JTAG Input Format Table 7 Instruction Bit Number Bit Name Select DR 1 Select IR Scan Scan 0 1 Capture Capture DR 0 Shift DR Shift ...

Page 17

... OE Select Mode I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Table 8 JTAG Instructions B7 A6-A0 Instruction X X Sample/EXTEST X X Sample/EXTEST X X Reset the Crosspoint Array X X Set Array for Broadcast mode ...

Page 18

... JTAG Address Register becomes the Input port address for Crosspoint Access. Serialize the device ID and revision history out to TDO. ID for the OCX160 is 0x0000B89F Resets the Crosspoint Array to no-connects. Sets the Output buffer to Flow-through mode with Output Enabled. The device ID is serialized to TDO. ...

Page 19

... Reset JTAG Controller + Reset ALL Output Ports + Clear ALL SRAM cells Connect or disconnect two Ports Configure Entire Switch Matrix Completely Configure the Device (All Output Ports and All Switch Matrix Connections) I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Programming an Output using JTAG Signal/Function Clock Select Global Clock ...

Page 20

... OCX160 Crosspoint Switch—Preliminary Data Sheet 1.5 Device Reset Options The power-on reset, RapidConfigure reset, hardware reset, and JTAG reset functions will program the output buffers to flow-through mode (with Global Clock selected), and Output Enabled (ON). JTAG can be reset via the TRST# pin or by clocking five consecutive one to the TMS pin. The hardware reset pin can be done accomplished through the HW_RST# pin (active low) ...

Page 21

... LVDS and LVPECL output voltage levels. 4. The LVTTL control, JTAG pins, and differential input ports are 3.3V—they are not 5V tolerant. 5. The differential output pins powered from 2.5V are 3.3V tolerant. I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet OCX160 Pin Description Type Input ...

Page 22

... The OCX160 support the two most popular differential signaling standards: Low Voltage Differential Signaling (LVDS) and Low Voltage Positive Emitter Coupled Logic (LVPECL). LVDS is typically used in communication systems as high speed, low noise point-to-point links. The OCX160 conforms to the ANSI/TIA/EIA-644 standard covering electrical specifications for output drivers and receiver inputs ...

Page 23

... Transmitting and receiving circuits for LVPECL are shown in Figures 9 and 10. OCX Device 3.3V Data Transmit V .PAD=3.3V DD LVPECL Output Figure 9 from LVPECL Driver Figure 10 Receiving LVPECL Signal Circuit I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Z = OUTP S 100 R DIV 187 Z = ...

Page 24

... Bournes Part Number Differential I/O Standard CAT16-LV2F6 CAT16-LV4F12 CAT16-PC2F6 CAT16-PC4F12 CAT16-PT2F2 CAT16-PT4F4 3.4 Mixed I/O Systems The use of different supply voltages and terminating resistors allows the OCX160 to support LVDS / LVPECL translation as well as switching as outlined in Table 14. Table 14 Supply Voltages and Terminating Resistors Input LVDS LVPECL LVDS LVPECL ...

Page 25

... All inputs are 3.3V tolerant with the V 4. Note that min and max values for Capacitance measured at 25°C. Sample tested only. 6. Measured using Human Body Model. I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Table 15 Absolute Maximum Ratings Parameter -0.3 to +3.0 -0.3 to +3.6 -0.3 to +3.6 -0.3 to +3.6 -65 to +150 ...

Page 26

... OCX160 Crosspoint Switch—Preliminary Data Sheet 4.4 DC Electrical Specifications (T = -40°C to 85°C, V .IN = 3.3V ±10 Table 18 Symbol Parameter V High-level Input IH V Low-level Input IL V High-level Output OH V Low-level Output OL ( Input Pin Leakage Current Tristate Leakage Output OFF State ...

Page 27

... JTAG Hold Time H_JTAG t JTAG Clock to Output Data Valid (TDO) P_JTAG NOTES: 1. These parameters are guaranteed but not tested in production. I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet AC Electrical Specifications Parameter (1) (1) (1) [Rev. 1.6] 2/20/01 0°C to 70°C -40°C to +85°C Min Max ...

Page 28

... OCX160 Crosspoint Switch—Preliminary Data Sheet 4.6 Timing Diagrams Note – For the purpose of clarity, the timing diagrams within this data sheet are conceptual representations only and do not show actual circuit implementation Switch Matrix InPort OutPort D Q CLK Figure 11 Registered Output Mode Timing ...

Page 29

... Switch IN OP InPort Matrix RC_CLK# RCA/RCB Address, Instruction RC_EN# Figure 15 RapidConfigure Write Cycle I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet t IN+ InPort OutPort t OUT+ OutPort Figure 14 Duty Cycle Distortion W+_RC W-_RC t t S_RC H_RC t t S_RC H_RC [Rev. 1.6] 2/20/01 ...

Page 30

... OCX160 Crosspoint Switch—Preliminary Data Sheet t W+_RC RC_CLK# t RCA/RCB Address, Instruction RC_EN# High Impedance RCO Figure 16 RapidConfigure Read Cycle t W_JTAG TCK t S_JTAG TDI, TMS TDO W-_RC t S_RC H_RC t t S_RC H_RC t W_JTAG t H_JTAG t P_JTAG Figure 17 JTAG Timing [Rev. 1.6] 2/20/01 Data Valid I-Cube, Inc ...

Page 31

... Typical Performance at 667 Mb/s with PRBS Data (Currently not available for this document) Typical Performance at 667 Mb/s with PRBS Data (Currently not available for this document) Figure 19 Typical Performance LVPECL mode I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Figure 18 Typical Performance LVDS mode [Rev. 1.6] 2/20/01 31 ...

Page 32

... OCX160 Crosspoint Switch—Preliminary Data Sheet 5. Package and Pinout 5.1 Package Pinout VSS IN48N IN40N IN42N A IN44N VSS IN41N RC_CLK# IN40P IN42P IN48P B IN44P IN41P VSS OUT78P VSS RCI3 ...

Page 33

... IN76P B23 IN76N A24 IN77P B24 IN77N A25 RCO4 B25 VSS A26 V B26 HW_RST# SS I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet OCX160 Pinout By Ball Sequence Ball # Ball Name Ball # Ball Name C1 OUT78P D1 C2 OUT78N RCI2 D4 C5 RCI3 ...

Page 34

... OUT26N AA1 OUT51P AA2 OUT50N AA3 OUT50P AA4 OUT41N AA5 RCB3 AA22 OUT39N AA23 OUT39P AA24 OUT36N AA25 OUT35N AA26 OUT35P 34 OCX160 Pinout By Ball Sequence (Continued) Ball # Ball Name Ball # Ball Name H1 OUT72N J1 OUT67N H2 OUT72P J2 OUT67P H3 OUT70P J3 OUT69P H4 OUT71N J4 OUT70N H5 OUT71P J5 V ...

Page 35

... AB24 OUT38P AC24 V SS AB25 OUT36P AC25 RCO1 AB26 OUT33N AC26 OUT33P I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet OCX160 Pinout By Ball Sequence (Continued) Ball # Ball Name Ball # Ball Name AD1 RCB0 AE1 AD2 RCB1 AE2 AD3 V AE3 SS AD4 RCA4 ...

Page 36

... AF17 IN38P IN17N AF16 IN39N IN17P AE16 IN39P IN18N AF15 IN40N IN18P AE15 IN40P IN19N AF14 IN41N IN19P AE14 IN41P 36 OCX160 Pinout By Ball Name Ball # Ball Name AE13 IN42N A5 IN64N IN42P B5 IN64P IN43N D6 IN65N IN43P C6 IN65P AE12 IN44N A6 IN66N IN44P B6 IN66P ...

Page 37

... OUT48P AB1 OUT72N OUT49N T5 OUT72P OUT49P T4 OUT73N OUT50N AA2 OUT73P OUT50P AA3 OUT74N I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet OCX160 Pinout By Ball Name (Continued) Ball # Ball Name Ball # Ball Name Y1 OUT74P F2 V .CORE DD AA1 OUT75N E2 V .CORE DD U3 OUT75P ...

Page 38

... OCX160 Crosspoint Switch—Preliminary Data Sheet 5.4 Package Dimensions (BOTTOM VIEW) (TOP VIEW) (SIDE VIEW) Figure 21 OCX160 Package—Bottom, Top and Side Views 38 [Rev. 1.6] 2/20/01 I-Cube, Inc. ...

Page 39

... Package Thermal Characteristics Table 24 Package PBGA NOTE: 1. Thermal performance values are based on simulation data. I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Package Thermal Coefficients Pin Count (C/W) JC 420 1.7°C/W [Rev. 1.6] 2/20/01 ° ( C/W) JA Still Air 12°C/W 39 ...

Page 40

... OCX160 Crosspoint Switch—Preliminary Data Sheet 6. Power Consumption There are two main factors to consider when calculating power consumption for the OCX160: • Power consumed by the chip • Power dissipated by the terminating resistors at the switch differential outputs The first component, chip power, consists of three integral elements (refer to Figure 22): 1. Input Power— ...

Page 41

... Input Power (always ON) + 4mW/Input 0.015mW /Mbs/Connection Example: Worst Case = (4mW x 80) + (0.015 mW x 667 x 80) + (4mW x 80) 320mW Figure 23 Power Consumption Diagram for the OCX160 using LVPECL I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Chip Power + Core Output Power Power ...

Page 42

... OCX160 Crosspoint Switch—Preliminary Data Sheet 7. Component Availability and Ordering Information Family # I/O Ports Package Code PB = Ball Grid Array Temperature Range Blank - Commercial (0°C to 70° Industrial (-40°C to +85°C) 8. Glossary CLOCK: A single differential input used to gate data into registers in the Output Buffer. The input serves all outputs of the OCX ...

Page 43

... Revision 1.6 Changed the V DC specifications in Table 20; added a note below table explaining the current values; changed Pass Transistor to proprietary high-performance buffering circuit. I-Cube, Inc. OCX160 Crosspoint Switch—Preliminary Data Sheet Revision History Description , and V minimum and maximum values for LVPECL ...

Page 44

... This product is protected under the U.S. patents: 5202593, 5282271, 5426738, 5428750, 5428800, 5465056, 5530814, 5559971, 5625780, 5710550, 5717871, 5734334, 5781717, 5790048. Additional patents pending. OCX160 Crosspoint Switch Data Sheet— Rev 1.6, February 2001 Copyright © 1992-2001 I-Cube, Inc. All rights reserved. Unpublished—rights reserved under the copyright laws of the United States. Use of copyright notices is precautionary and does not imply publication or disclosure. ® ...

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