TC55V16256FT12 TOSHIBA Semiconductor CORPORATION, TC55V16256FT12 Datasheet

no-image

TC55V16256FT12

Manufacturer Part Number
TC55V16256FT12
Description
TSOP
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

Specifications of TC55V16256FT12

Date_code
01+
262,144-WORD BY 16-BIT CMOS STATIC RAM
DESCRIPTION
words by 16 bits. Fabricated using CMOS technology and advanced circuit techniques to provide high speed, it
operates from a single 3.3 V power supply. Chip enable ( CE ) can be used to place the device in a low-power mode,
and output enable ( OE ) provides fast memory access. Data byte control signals ( LB , UB ) provide lower and upper
byte access. This device is well suited to cache memory applications where high-speed access and high-speed
storage are required. All inputs and outputs are directly LVTTL compatible. The TC55V16256J/FT is available in
plastic 44-pin SOJ and TSOP with 400mil width for high density surface assembly.
FEATURES
PIN ASSIGNMENT
GND
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
A15
A14
A13
A12
A16
WE
V
The TC55V16256J/FT is a 4,194,304-bit high-speed static random access memory (SRAM) organized as 262,144
CE
A4
A3
A2
A1
A0
DD
Fast access time (the following are maximum values)
Low-power dissipation
(the following are maximum values)
44 PIN SOJ
Operation (max)
(TC55V16256J)
TC55V16256J/FT-12:12 ns
TC55V16256J/FT-15:15 ns
Standby:4 mA (both devices)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Cycle Time
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
220
UB
LB
12
A5
A6
A7
OE
I/O16
I/O15
I/O14
I/O13
GND
V
I/O12
I/O11
I/O10
I/O9
NU
A8
A9
A10
A11
A17
DD
(TOP VIEW)
190
15
GND
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
A15
A14
A13
A12
A16
WE
V
CE
44 PIN TSOP
A4
A3
A2
A1
A0
DD
160
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
140
(TC55V16256FT)
25
mA
ns
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
UB
LB
A5
A6
A7
OE
I/O16
I/O15
I/O14
I/O13
GND
V
I/O12
I/O11
I/O10
I/O9
NU
A8
A9
A10
A11
A17
DD
Single power supply voltage of 3.3 V ± 0.3 V
Fully static operation
All inputs and outputs are LVTTL compatible
Output buffer control using OE
Data byte control using LB (I/O1 to I/O8) and
Package:
UB (I/O9 to I/O16)
SOJ44-P-400-1.27 (J)
TSOP II44-P-400-0.80 (FT)
PIN NAMES
I/O1 to I/O16 Data Inputs/Outputs
A0 to A17
LB , UB
GND
V
WE
CE
OE
NU
DD
TC55V16256J/FT-12,-15
Address Inputs
Chip Enable Input
Write Enable Input
Output Enable Input
Data Byte Control Inputs
Power (+3.3 V)
Ground
Not Usable (Input)
2002-01-07 1/11
(Weight: 1.64 g typ)
(Weight: 0.45 g typ)

Related parts for TC55V16256FT12

Related keywords