CY7C1049CV33-12ZXI Cypress Semiconductor Corporation., CY7C1049CV33-12ZXI Datasheet
CY7C1049CV33-12ZXI
Manufacturer Part Number
CY7C1049CV33-12ZXI
Description
Manufacturer
Cypress Semiconductor Corporation.
Specifications of CY7C1049CV33-12ZXI
Case
TSOP44
Date_code
2006+
Cypress Semiconductor Corporation
Document #: 38-05006 Rev. *E
Features
Notes:
1. For guidelines on SRAM system design, please refer to the System Design Guidelines Cypress application note, available on the internet at www.cypress.com.
• Temperature Ranges
• High speed
• Low active power
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
CE
WE
OE
Logic Block Diagram
— Commercial: 0°C to 70°C
— Industrial: –40°C to 85°C
— Automotive: –40°C to 125°C
— t
— 324 mW (max.)
A
A
A
A
A
A
A
A
A
A
A
10
0
1
2
3
4
5
6
7
8
9
AA
= 10 ns
INPUT BUFFER
DECODER
COLUMN
512K x 8
ARRAY
POWER
DOWN
•
3901 North First Street
Functional Description
The CY7C1049CV33 is a high-performance CMOS Static
RAM organized as 524,288 words by 8 bits. Easy memory
expansion is provided by an active LOW Chip Enable (CE), an
active LOW Output Enable (OE), and three-state drivers.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a Write
operation (CE LOW, and WE LOW).
The CY7C1049CV33 is available in standard 400-mil-wide
36-pin SOJ package and 44-pin TSOP II package with center
power and ground (revolutionary) pinout.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
0
1
2
3
4
5
6
7
4-Mbit (512K x 8) Static RAM
GND
V
I/O
I/O
I/O
I/O
WE
CE
CC
A
A
A
A
A
A
A
A
A
A
0
•
0
1
2
3
4
0
1
2
3
5
6
7
8
9
through I/O
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
San Jose
Top View
SOJ
Pin Configuration
7
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
,
) is then written into the location
CA 95134
NC
A
A
A
A
OE
I/O
I/O
GND
V
I/O
I/O
A
A
A
A
A
NC
[1]
0
18
17
16
15
CC
14
13
12
11
10
Revised March 29, 2005
0
through I/O
7
6
5
4
through A
CY7C1049CV33
CE
I/O
I/O
V
I/O
I/O
WE
A
V
A
A
A
A
NC
NC
A
A
A
CC
NC
NC
A
A
SS
5
6
7
8
9
4
2
3
0
1
0
1
2
3
•
Top View
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
18
TSOP II
7
) are placed in a
).
408-943-2600
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
NC
A
A
A
A
OE
I/O
I/O
V
V
I/O
I/O
A
A
A
A
A
NC
NC
NC
NC
SS
CC
11
10
18
17
16
15
14
13
12
7
6
5
4
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