TN2640N3 Supertex, TN2640N3 Datasheet
TN2640N3
Manufacturer Part Number
TN2640N3
Description
TO-92
Manufacturer
Supertex
Specifications of TN2640N3
Date_code
05+
Features
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-G indicates package is RoHS compliant (‘Green’)
* MIL visual screening available
Absolute Maximum Ratings
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
Ordering Information
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Soldering temperature*
TN2640
Device
Low threshold (2.0V max.)
High input impedance
Low input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
TO-252 (D-PAK) 8-Lead SOIC
TN2640K4-G
TN2640LG-G TN2640N3-G TN2640ND
N-Channel Enhancement-Mode
Vertical DMOS FETs
Package Options
-55°C to +150°C
+300°C
TO-92
Value
BV
BV
±20V
DGS
DSS
Pin Confi gurations
General Description
This low threshold enhancement-mode (normally-off)
transistor utilizes a vertical DMOS structure and Supertex’s
well-proven silicon-gate manufacturing process. This
combination produces a device with the power handling
capabilities of bipolar transistors and with the high input
impedance and positive temperature coeffi cient inherent
in MOS devices. Characteristic of all MOS structures, this
device is free from thermal runaway and thermally induced
secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
TO-252 (D-PAK) (K4)
Die*
DRAIN
BV
GATE
DSS
400
(V)
SOURCE
/BV
DRAIN
TO-92 (N3)
DGS
R
(max)
DS(ON)
5.0
SOURCE
(Ω)
DRAIN
DRAIN
8-Lead SOIC (LG)
GATE
DRAIN
DRAIN
V
(max)
2.0
GS(th)
(V)
TN2640
N/C
N/C
SOURCE
GATE
I
(min)
D(ON)
2.0
(A)
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