HYS64D128320HU-5-B QIMONDA [Qimonda AG], HYS64D128320HU-5-B Datasheet - Page 15

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HYS64D128320HU-5-B

Manufacturer Part Number
HYS64D128320HU-5-B
Description
42184-Pin Unbuffered Double-Data-Rate Memory Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1) 0 °C ≤
2) DDR400 conditions apply for all clock frequencies above 166 MHz
3) Under all conditions,
4) Peak to peak AC noise on
5)
6)
7) The ration of the pull-up current to the pull-down current is specified for the same temperature and voltage, over the entire temperature
8) Inputs are not recognized as valid until
9) Values are shown per component
Rev. 1.22, 2007-01
03292006-CXBY-V2JX
Parameter
Device Supply Voltage
Device Supply Voltage
Output Supply Voltage
Output Supply Voltage
EEPROM supply voltage
Supply Voltage, I/O Supply
Voltage
Input Reference Voltage
I/O Termination Voltage
(System)
Input High (Logic1) Voltage
Input Low (Logic0) Voltage
Input Voltage Level, CK and
CK Inputs
Input Differential Voltage, CK
and CK Inputs
VI-Matching Pull-up Current
to Pull-down Current
Input Leakage Current
Output Leakage Current
Output High Current, Normal
Strength Driver
Output Low Current, Normal
Strength Driver
V
must track variations in the DC level of
V
and voltage range, for device drain to source voltage from 0.25 to 1.0 V. For a given output, it represents the maximum difference between
pull-up and pull-down drivers due to process variation.
TT
ID
is the magnitude of the difference between the input level on CK and the input level on CK.
is not applied directly to the device.
T
A
≤ 70 °C
V
DDQ
must be less than or equal to
V
REF
Symbol
V
V
V
V
V
V
V
V
V
V
V
V
V
VI
I
I
I
I
may not exceed ± 2% VREF (DC). VREF is also expected to track noise variations in
I
OZ
OH
OL
DD
DD
DDQ
DDQ
DDSPD
SS
SSQ
REF
TT
IH(DC)
IL(DC)
IN(DC)
ID(DC)
Ratio
,
V
V
V
REF
REF
TT
Min.
2.3
2.5
2.3
2.5
2.3
0
0.49 ×
V
V
–0.3
–0.3
0.36
0.71
–2
–5
16.2
.
is a system supply for signal termination resistors, is expected to be set equal to
stabilizes.
REF
REF
+ 0.15
– 0.04
V
DDQ
V
DD
.
Typ.
2.5
2.6
2.5
2.6
2.5
0.5 ×
Electrical Characteristics and DC Operating Conditions
Values
15
V
DDQ
Max.
2.7
2.7
2.7
2.7
3.6
0
0.51 ×
V
V
V
V
V
1.4
2
5
–16.2
REF
DDQ
REF
DDQ
DDQ
+ 0.04
– 0.15
+ 0.3
+ 0.3
+ 0.6
HYS[64/72]D[32/64/128]xxx[G/H]U–[5/6]–B
V
DDQ
Unit Note
V
V
V
V
V
V
V
V
V
V
V
V
µA
µA
mA
mA
Unbuffered DDR SDRAM Modules
f
f
f
f
4)
5)
8)
8)
8)
8)6)
7)
Any input 0 V ≤
other pins not under test = 0 V
8)9)
DQs are disabled; 0 V ≤
V
V
V
CK
CK
CK
CK
DDQ
OUT
OUT
≤ 166 MHz
> 166 MHz
≤ 166 MHz
> 166 MHz
1)
= 1.95 V
= 0.35 V
8)
/ Test Condition
Internet Data Sheet
8)
8)
3)
2)
2)3)
V
V
DDQ
TABLE 8
IN
.
V
V
REF
DD
V
; All
, and
OUT

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