HYS64T128020EDL-2.5-B QIMONDA [Qimonda AG], HYS64T128020EDL-2.5-B Datasheet - Page 14

no-image

HYS64T128020EDL-2.5-B

Manufacturer Part Number
HYS64T128020EDL-2.5-B
Description
200-Pin Small-Outlined DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
3.3
3.3.1
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew
Rev. 1.12, 2007-10
10312006-I253-V1V0
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Speed Grade
QAG Sort Name
CAS-RCD-RP latencies
Parameter
Clock Period
Row Active Time
Row Cycle Time
RAS-CAS-Delay
Row Precharge Time
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal
OCD drive strength (EMRS(1) A1 = 0) mentioned in Component datasheet.
@ CL = 3
@ CL = 4
@ CL = 5
Timing Characteristics
Speed Grade Definitions
@ CL = 3
@ CL = 4
@ CL = 5
@ CL = 6
Symbol
t
t
t
t
t
t
t
CK
CK
CK
RAS
RC
RCD
RP
Symbol
t
t
t
t
t
t
t
t
CK
CK
CK
CK
RAS
RC
RCD
RP
DDR2–667C
–3
4–4–4
Min.
5
3
3
45
57
12
12
14
DDR2–800E
–2.5
6–6–6
Min.
5
3.75
3
2.5
45
60
15
15
Max.
8
8
8
70k
DDR2–533C
–3.7
4–4–4
Min.
5
3.75
3.75
45
60
15
15
Max.
8
8
8
8
70k
Small Outlined DDR2 SDRAM Modules
HYS64T128020EDL–[2.5/3S/3.7]–B
Max.
8
8
8
70k
Unit
t
ns
ns
ns
ns
ns
ns
ns
ns
CK
Speed Grade Definition
Speed Grade Definition
Unit
t
ns
ns
ns
ns
ns
ns
ns
CK
Internet Data Sheet
TABLE 12
TABLE 13
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)
Note
1)2)3)4)
1)2)3)4)
1)2)3)4)
1)2)3)4)5)
1)2)3)4)
1)2)3)4)
1)2)3)4)

Related parts for HYS64T128020EDL-2.5-B