ISL6551AB INTERSIL [Intersil Corporation], ISL6551AB Datasheet

ISL6551AB

Manufacturer Part Number

ISL6551AB

Description

ZVS Full Bridge PWM Controller

Manufacturer

INTERSIL [Intersil Corporation]

Datasheet

1.ISL6551AB.pdf (26 pages)

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Bonase Electronics (HK) Co., Limited

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Intersil

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ZVS Full Bridge PWM Controller

The ISL6551 is a zero voltage switching (ZVS) full-bridge

PWM controller designed for isolated power systems. This

part implements a unique control algorithm for fixed-

frequency ZVS current mode control, yielding high efficiency

with low EMI. The two lower drivers are PWM-controlled on

the trailing edge and employ resonant delay while the two

upper drivers are driven at a fixed 50% duty cycle.

This IC integrates many features in both 6x6 mm

28-lead SOIC packages to yield a complete and

sophisticated power supply solution. Control features include

programmable soft-start for controlled start-up,

programmable resonant delay for zero voltage switching,

programmable leading edge blanking to prevent false

triggering of the PWM comparator due to the leading edge

spike of the current ramp, adjustable ramp for slope

compensation, drive signals for implementing synchronous

rectification in high output current, ultra high efficiency

applications, and current share support for paralleling up to

10 units, which helps achieve higher reliability and

availability as well as better thermal management. Protective

features include adjustable cycle-by-cycle peak current

limiting for overcurrent protection, fast short-circuit protection

(in hiccup mode), a latching shutdown input to turn off the IC

completely on output overvoltage conditions or other

extreme and undesirable faults, a non-latching enable input

to accept an enable command when monitoring the input

voltage and thermal condition of a converter, and VDD under

voltage lockout with hysteresis. Additionally, the ISL6551

includes high current high-side and low-side totem-pole

drivers to avoid additional external drivers for moderate gate

capacitance (up to 1.6nF at 1MHz) applications, an

uncommitted high bandwidth (10MHz) error amplifier for

feedback loop compensation, a precision bandgap reference

with ±1.5% (ISL6551AB) or ±1% (ISL6551IB) tolerance over

recommended operating conditions, and a ±5% “in

regulation” monitor.

In addition to the ISL6551, other external elements such as

transformers, pulse transformers, capacitors, inductors and

Schottky or synchronous rectifiers are required for a

complete power supply solution. A detailed 200W telecom

power supply reference design using the ISL6551 with

companion Intersil ICs, Supervisor And Monitor ISL6550 and

Half-bridge Driver HIP2100, is presented in Application Note

AN1002.

In addition, the ISL6551 can also be designed in push-pull

converters using all of the features except the two upper

drivers and adjustable resonant delay features.

Data Sheet

QFN and

1-888-INTERSIL or 1-888-468-3774

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Features

• High Speed PWM (up to 1MHz) for ZVS Full Bridge

• Current Mode Control Compatible

• High Current High-Side and Low-Side Totem-Pole Drivers

• Adjustable Resonant Delay for ZVS

• 10MHz Error Amplifier Bandwidth

• Programmable Soft-Start

• Precision Bandgap Reference

• Latching Shutdown Input

• Non-latching Enable Input

• Adjustable Leading Edge Blanking

• Adjustable Dead Time Control

• Adjustable Ramp for Slope Compensation

• Fast Short-Circuit Protection (Hiccup Mode)

• Adjustable Cycle-by-Cycle Peak Current Limiting

• Drive Signals to Implement Synchronous Rectification

• VDD Under-voltage Lockout

• Current Share Support

• ±5% “In Regulation” Indication

• QFN Package:

• Pb-Free Plus Anneal Available (RoHS Compliant)

Applications

• Full-Bridge and Push-Pull Converters

• Power Supplies for Off-line and Telecom/Datacom

• Power Supplies for High End Microprocessors and

Control

- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat

- Near Chip Scale Package footprint, which improves

Servers

No Leads - Package Outline

PCB efficiency and has a thinner profile

All other trademarks mentioned are the property of their respective owners.

July 8, 2005

Intersil (and design) is a registered trademark of Intersil Americas Inc.

ISL6551

FN9066.4

Related parts for ISL6551AB

ISL6551AB Summary of contents

Page 1

... In addition to the ISL6551, other external elements such as ...

... Tape & Reel (Pb-free) M28.3 (Note) ISL6551IR 6x6 QFN ISL6551IR Tape & Reel ISL6551ABZ (Note) -40 to 105 28 Ld SOIC (Pb-free) M28.3 ISL6551ABZ-T -40 to 105 Tape & Reel (Pb-free) M28.3 (Note) Pinouts 28 PIN WIDE BODY (SOIC) TOP VIEW ...

Page 3

Functional Pin Description PACKAGE PIN # SOIC QFN PIN SYMBOL 9 6 R_LEB 10 7 CS_COMP 11 8 CSS 12 9 EANI 13 10 EAI 14 11 EAO 15 12 SHARE 16 13 LATSD 17 14 DCOK 18 15 ON/OFF ...

Page 4

Functional Block Diagram BANDGAP REFERENCE BGREF 8 7 PKILIM R_LEB 9 RESODLY RESODLY R_RESDLY 4 ISENSE 6 RAMP RAMP ADJUST ADJUST R_RA CLOCK 3 RD GENERATOR ERROR AMP (See Fig. 4) EAO 14 13 EAI DC OK ...

Page 5

... Machine Model (Per EIAJ ED-4701 Method C-111 .250V Recommended Operating Conditions Ambient Temperature Range ISL6551IB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 85°C ISL6551AB .-40°C to 105°C Supply Voltage Range, VDD . . . . . . . . . . . . . . . . . . . 10.8V to 13.2V Supply Voltage Range, VDDP1 & VDDP2 . . . . . . . . . . . . . . . <13.2V Maximum Operating Junction Temperature . . . . . . . . . . . . . . . 125°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...

Page 6

... Cycle-by-Cycle Current Limit Vclamp (ISL6551AB) DRIVERS (UPPER1, UPPER2, LOWER1, LOWER2) Maximum Capacitive Load (each) Turn On Rise Time (ISL6551IB) Turn On Rise Time (ISL6551AB) Turn Off Fall Time (ISL6551IB) Turn Off Fall Time (ISL6551AB) Shutdown Delay (Note 4) Rising Edge Delay (Note 4) Falling Edge Delay (Note 4) ...

Page 7

... Electrical Specifications These specifications apply for VDD = VDDP = 12V and T (ISL6551AB), Unless Otherwise Stated (Continued) PARAMETER SYMBOL Vsat_sinking (ISL6551IB) Vsat_low Vsat_sinking (ISL6551AB) Vsat_low SYNCHRONOUS SIGNALS (SYNC1, SYNC2) Maximum capacitive load (each) PROGRAMMABLE DELAYS (RESDLY, LEB) (Note 4) Resonant Delay Adjust Range Resonant Delay ...

Page 8

Drive Signals Timing Diagrams CLOCK UPPER1 UPPER2 SYNC1 SYNC2 LOWER1 I LOWER1 LOWER2 I LOWER2 RAMP ADJUST OUTPUT TO PWM LOGIC T1 NOTES Leading edge blanking Resonant delay dead time ...

Page 9

Shutdown Timing Diagrams LATSD ON/OFF A VDD PKILIM > BGREF ILIM_OUT PKILIM < BGREF SOFT START DRIVER ENABLE SOFT-START SHUTDOWN FAULT OFF Shutdown Timing Descriptions A (ON/OFF) - When the ON/OFF is pulled low, the soft-start capacitor is discharged and ...

Page 10

Block/Pin Functional Descriptions Detailed descriptions of each individual block in the functional block diagram on page 3 are included in this section. Application information and design considerations for each pin and/or each block are also included. • IC Bias Power ...

Page 11

CT (pF) RECOMMENDED RANGE FIGURE FREQUENCY - Note that the capacitance of a scope probe (~12pF for single ended) would induce a smaller frequency ...

Page 12

Per Equation 3, the clamping voltage is a function of the charge current Iss. For a more predictable clamping voltage, the CSS pin can be connected to a reference- based clamp circuit as shown in Figure 5. To make ...

Page 13

R_RESDLY (kΩ) FIGURE 7. R_RESDLY vs RESDLY • Leading Edge Blanking (R_LEB current mode control, the sensed switch (FET) current is processed ...

Page 14

Ramp Adjust (R_RA, ISENSE) - The ramp adjust block adds an offset component (200mV) and a slope adjust component to the ISENSE signal before processing it at the PWM Logic block, as shown in Figure 9. This ensures that ...

Page 15

Power Good (DCOK) - DCOK pin is an open drain output capable of sinking 5mA low when the output voltage is within the UVOV window. The static regulation limit is ± the 5% is the dynamic regulation ...

Page 16

Additional Applications Information Table 1 highlights parameter setting for the ISL6551. Designers can use this table as a design checklist. For TABLE 1. PARAMETER SETTING HIGHLIGHTS/CHECKLIST VDD = 12V at room temperature, unless otherwise stated. PARAMETER PIN NAME Frequency Dead ...

Page 17

Figure 13 shows the block diagram of a power supply system employing the ISL6551 full bridge controller. The ISL6551 not only is a full bridge PWM controller but also can be used as a push-pull PWM controller. Users can design ...

Page 18

Current Sense T_CURRENT Q3_S Q4_S FIGURE 14A. TWO-LEG SENSE CURRENT_SEN_P FIGURE 14B. TOP SENSE Q3_S & Q4_S RSENSE FIGURE 14C. RESISTOR SENSE (PRIMARY CONTROL) Two-Leg Sense - Senses the current that flows through both lower primary FETs. ...

Page 19

Feedback EAI VOPOUT FIGURE 16A. SECONDARY CONTROL VREF = 5V VOPOUT IL207 TL431 FIGURE 16B. PRIMARY CONTROL Secondary Control - In secondary side control systems, only a few resistors and capacitors are required to complete the feedback loop. Primary Control ...

Page 20

Main Transformers P– S– FIGURE 18A. FULL BRIDGE AND CURRENT DOUBLER P– S– FIGURE 18B. CONVENTIONAL FULL BRIDGE P1– CURRENT_SEN_P S– P2– FIGURE 18C. PUSH-PULL AND CURRENT ...

Page 21

Output Filter L S+ OUT S– FIGURE 20A. CURRENT DOUBLER FILTER L OUT V F OUT F CLOCK FIGURE 20B. CONVENTIONAL FILTER Current Doubler Filter - Two inductors are needed, but they can be integrated and coupled into one core. ...

Page 22

Primary FET Drivers (1) PUSH-PULL DRIVERS LOWER1 LOWER2 FIGURE 23A. PUSH-PULL MEDIUM CURRENT DRIVERS Push-Pull Medium Current Drivers - Upper drivers are not used. No external drivers are required. Secondary control. Operate at the switching frequency. Push-Pull High Current Drivers ...

Page 23

FULL BRIDGE DRIVERS UPPER1 UPPER2 LOWER1 LOWER2 FIGURE 24A. FULL BRIDGE HIGH CURRENT DRIVERS Full Bridge High Current Drivers - External high current drivers are required and less power is dissipated in the ISL6551 controller. Secondary control. Operate at ...

Page 24

Simplified Typical Application Schematics SB+12V UPPER1 UPPER2 LOWER1 LOWER2 SA+12V + OUT - PGND UPPER1 UPPER2 LOWER1 LOWER2 SYNC1 SYNC2 LED SHARE BUS 200W TELECOMMUNICATION POWER SUPPLY (SEE AN1002 FOR DETAILS) SB+48V VDD LO HB VSS ...

Page 25

Small Outline Plastic Packages (SOIC) N INDEX 0.25(0.010) H AREA E - SEATING PLANE - -C- α 0.10(0.004) 0.25(0.010 NOTES: 1. Symbols are defined in the ...

Page 26

Quad Flat No-Lead Plastic Package (QFN) Micro Lead Frame Plastic Package (MLFP) All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description ...

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