HX6656 ETC1 [List of Unclassifed Manufacturers], HX6656 Datasheet
HX6656
Related parts for HX6656
HX6656 Summary of contents
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... Asynchronous Operation 11 rad(Si)/s • CMOS or TTL Compatible I/O • Single 5 V ± 10% Power Supply cm -2 • Packaging Options - 28-Lead Flat Pack (0.500 in. x 0.720 in.) - 28-Lead DIP, MIL-STD-1835, CDIP2-T28 - 36-Lead Flat Pack (0.630 in. x 0.650 in.) ™ IV (Radiation Insen- ™ IV process is a HX6656 ...
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... HX6656 FUNCTIONAL DIAGRAM A:0-8,12- NCS NO E A:9-11,14 4 SIGNAL DEFINITIONS A: 0-14 Address input pins which select a particular eight-bit word within the memory array. Q: 0-7 Data Output Pins. NCS Negative chip select, when at a low level allows normal read operation. When at a high level NCS forces the ROM to a precharge condition, holds the data output drivers in a high impedance state and disables all input buffers except CE ...
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... SCR latchup structures. Sufficient transistor body tie con- nections to the p- and n-channel substrates are made to ensure no source/drain snapback occurs. Limits (2) Units ≥1x10 6 rad(SiO ≥1x10 9 rad(Si)/s ≥1x10 11 rad(Si)/s ≥1x10 14 N/cm 3 HX6656 applied 2 . Test Conditions ) T =25° Pulse width ≤1 µs Pulse width ≤50 ns, X-ray, VDD=6 =25°C A ...
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... HX6656 ABSOLUTE MAXIMUM RATINGS (1) Symbol VDD Positive Supply Voltage (2) VPIN Voltage on Any Pin (2) TSTORE Storage Temperature (Zero Bias) TSOLDER Soldering Temperature • Time PD Total Package Power Dissipation (3) IOUT DC or Average Output Current VPROT ESD Input Protection Voltage (4) Θ Thermal Resistance (Jct-to-Case) ...
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... V -0.05 DD 2.9 V Valid high + output Vref1 - 249Ω Vref2 + Valid low - output C L >50 pF for TWLQZ, TSHQZ, TELQZ, and TGHQZ 5 HX6656 (2) Units Test Conditions Max VIH=VDD IO=0 1.5 mA VIL=VSS Inputs Stable NCS=VDD, IO=0, 1.5 mA f=40 MHz f=1 MHz, IO=0, CE=VIH=VDD 4.0 mA NCS=VIL=VSS µA +1 VSS≤VI≤VDD VSS≤VIO≤VDD µ ...
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... HX6656 READ CYCLE AC TIMING CHARACTERISTICS (1) Symbol Parameter TAVAVR Address Read Cycle Time TAVQV Address Access Time TAXQX Address Change to Output Invalid Time TSLQV Chip Select Access Time TSLQX Chip Select Output Enable Time TSHQZ Chip Select Output Disable Time TEHQV Chip Enable Access Time (4) ...
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... CE is high will initiate a new read access, and data outputs will not become valid until TAVQV time following the address edge transition. Data outputs will enter a high impedance state TELQZ time following a disabling CE edge transition. 7 HX6656 ...
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... HX6656 TESTER AC TIMING CHARACTERISTICS Input Levels* Output Sense Levels * Input rise and fall times <1 ns/V QUALITY AND RADIATION HARDNESS ASSURANCE Honeywell maintains a high level of product integrity through process control, utilizing statistical process control, a com- plete “Total Quality Assurance System,” a computer data base process performance tracking system, and a radia- tion-hardness assurance strategy ...
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... DQ6 NC DQ5 VDD VSS DQ4 DQ3 E 22018131-001 Top View L Non- Kovar Conductive Lid [3] Tie-Bar N Optional VDD VSS Capacitors VSS HX6656 36-LEAD FP PINOUT Top View ...
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... HX6656 28-LEAD FLAT PACK (22017842-001 TOP VIEW L W Capacitor X Y Kovar A Lid [ 28-LEAD DIP (22017785-001) For 28-Lead DIP description, see MIL-STD-1835, Type CDIP2-T28, Config. C, Dimensions D-10 b (width) BOTTOM e VIEW (pitch Pads Ceramic Body Lead C Alloy 42 [ Index ...
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... F12 R 24 F11 R 23 F10 R 22 F17 F17 VSS R 11 HX6656 STATIC BURN-IN DIAGRAM* VDD 28 1 A14 VDD A12 A13 ...
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... HX6656 ORDERING INFORMATION (1) H 6656 X PART NUMBER PROCESS PACKAGE DESIGNATION X=SOI SOURCE H=HONEYWELL - = Bare die (No Package) (1) Orders may be faxed to 612-954-2051. Please contact our Customer Logistics Department at 612-954-2888 for further information. (2) Engineering Device description: Parameters are tested from -55 to 125° burn-in, no radiation guaranteed. ...