QL8X12B-0PL44C QuickLogic Corp, QL8X12B-0PL44C Datasheet
QL8X12B-0PL44C
Manufacturer Part Number
QL8X12B-0PL44C
Description
Manufacturer
QuickLogic Corp
Datasheet
1.QL8X12B-0PL44C.pdf
(8 pages)
Specifications of QL8X12B-0PL44C
Date_code
0250+
Package
PLCC44
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usable ASIC gates,
Block Diagram
96 Logic Cells
HIGHLIGHTS
64 I/O pins
QL8x12B
…1,000
pASIC
= Up to 56 prog. I/O cells, 6 Input high-drive cells, 2 Input/Clk (high-drive) cells
Low-Power, High-Output Drive – Standby current typically 2 mA.
A 16-bit counter operating at 100 MHz consumes less than 50 mA.
Minimum IOL of 12 mA and IOH of 8 mA
Low-Cost, Easy-to-Use Design Tools – Designs entered and
simulated using QuickLogic's new QuickWorks
environment, or with third-party CAE tools including Viewlogic,
Synopsys, Mentor, Cadence and Veribest. Fast, fully automatic place
and route on PC and workstation platforms using QuickLogic
software.
Very High Speed – ViaLink
antifuse technology, allows counter speeds over 150 MHz and logic
cell delays of under 2 ns.
High Usable Density – An 8-by-12 array of 96 logic cells provides
1,000 usable ASIC gates (2,000 PLD gates) in 44-pin and 68-pin
PLCC, and 100-pin TQFP packages.
4-5
Very-High-Speed CMOS FPGA
metal-to-metal programmable–via
pASIC
®
QL8X12B
1 Family
development
Rev B
4
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